先进CMOS高k栅介质的实验与理论研究
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摘要
随着集成电路的发展，摩尔定律一直驱动着集成电路的基本单元，即金属-氧化物-半导体场效应晶体管(MOSFET)的等比例缩小。在等比例缩小中，我们必须把栅氧化层的厚度减小为原来的1／k，这使得栅极氧化层的物理厚度走向了极限。当栅氧化层厚度无法再减小时，为了提升栅电容的数值，唯一的方法就是提高介质的相对介电常数。这就要求我们舍弃50年来一直在使用的SiO_2栅氧化层，转而使用相对介电常数更加高的材料，即高介电常数(High-k)介质。针对目前高k栅介质在实际研究中碰到的问题，本文对先进CMOS器件的高k栅介质开展了系统的实验和理论研究。一方面，用原子层淀积(atomic layer deposition)和分子束外延(Molecular beam epitaxy)方法制备了高性能的Al2O_3、HfO_2、Hf_xAl_yO_z、单晶Od_2O_3和单晶Nd_2O_3高k栅介质介质，系统研究了他们的材料结构、工艺优化以及电学性能；另一方面，通过第一性原理方法，系统研究了Hf基High-k介质本征点缺陷以及杂质点缺陷对高k栅介质材料和电学性能的影响。本文结果对先进CMOS器件中高k栅介质的应用具有重要的学术价值和指导意义。
本文首先用分子束外延的方法在Si(100)上外延了高质量的单晶Gd_2O_3和Nd_2O-3高k介质。采用W金属栅和Pt金属栅，通过Forming Gas退火以及的“GateLast”Forming Gas工艺，我们成功地钝化了在单晶高介电常数介质和Si衬底之间存在的界面态，大大地降低了栅极漏电流和界面态密度。经过工艺优化的单晶Gd_2O_3高k栅介质具有很好的电学性能：(1)获得的Gd_2O_3的介电常数为21．5；(2)制备的单晶Gd_2O-3表现出了极好的绝缘性能，其室温漏电流为5．69×10~(-6)A／cm~2(EOT=1．4 nm)，远低于国际半导体技术蓝图对2010年低功耗晶体管栅极漏电流的要求；(3)Gd_2O_3／Si(100)结构的C-V滞回电压可以降低到10 mV以内，界面态密度降到在10~(11)cm~(-2)eV~(-1)量级；研究了单晶Nd_2O_3栅介质／Si的近界面氧化层缺陷(NIOT)。利用低频C-V特性曲线，通过电学方法提取了NIOT。研究发现Nd_2O_3／Si(111)结构NIOT的密度为3．75×10~(12)cm~(-2)，并利用G-f法对近界面氧化层缺陷的测量进行了验证；
采用先进的原子层淀积工艺制备了Al_2O_3、HfO_2和HfAlO_(3．5)高k栅介质，优化了其生长工艺。在Si(100)衬底上制备了HfAlO_(3．5)高k栅介质，研究了1 kHz到100 kHz HfAlO_(3．5)高k栅介质的频率耗散特性。发现由于寄生电阻的关系，随着频率的上升，其MOS电容密度从0．73μF／cm~2下降到0．71μF／cm~2。在-0．5 V附近的C-V特性曲线存在扭结，表明有一定密度的慢界面态存在。在100 kHz下测定了A1／HfAlO_(3．5)／Si(100)MOS结构电容的高频C-V特性曲线，然后用Terman方法获得了Si禁带中央附近的界面态密度为5×10~(11)cm~(-2)eV~(-1)到1×10~(12)cm~(-2)eV~(-1)之间，并用Hill-Coleman测量方法进行了验证。
为了在GaAs衬底上原子层淀积高质量的A1_2O_3高k栅介质，提出了一种新的GaAs表面钝化方法，有效地抑制了GaAs衬底上原子层淀积Al_2O_3的过程中发生的氧化反应。即首先对GaAs表面硫化，然后把硫化的GaAs在500℃下的NH_3氛围下热处理5分钟。结果得到了稳定的氮化的表面，抑制了原子层淀积生长过程中氧化物前驱体对GaAs表面的氧化，同时也去除了对MOS器件电学性能产生严重影响的GaAs表面的单质As，极大地提升了Al／Al_2O_3／GaAs结构的积累电容密度。
研究了氧空位对Hf基栅介质原子结构和能带结构的影响。从能带结构发现，氧空位在HfO_2的禁带中央引入了带隙态，成为Trap-Assisted Tunneling或者Poole-Frenkel Tunneling等导电机制中的缺陷能级。分析表明，F离子进入氧空位以后，取代了原来氧离子的作用，通过F离子的2p轨道和Hf离子的5d轨道的p-d interaction造成轨道杂化，由于氟原子的电负性大于氧原子，把原来的Hf5d轨道上的带隙态推到了二氧化铪的导带以上，从来完全钝化了二氧化铪中的氧空位。从理论上解释了实验中发现的F离子对HfO_2氧空位的钝化能力。研究发现F离子在HfO_2和HfSiO_4介质中存在不同的钝化作用机理。在HfSiO_4中，由于Si和Hf的电正性的差异，在氧空位中的F接受来自于Hf的电子，而把来自于Si 2p轨道的电子推回到Si的2p轨道中，造成了具有7个核外电子的Si离子。这个Si离子的存在，造成了F离子对HfSiO_4的氧空位不具有钝化作用。
分析比较了F离子和N离子对HfSiO_4／Si结构在栅电压作用下氧空位的钝化效果。研究发现，在漏电流方面，HfSiO_4基MOS结构中F离子对氧空位的钝化优于N离子对氧空位的钝化。但是，当栅极电压变化时，F离子在氧空位中会引起其附近Si离子的充放电。这是通常意义上我们所说的慢界面态，而N则仅仅是负的固定电荷。由于界面态对器件性能退化的作用远大于固定电荷的影响，因此，N离子对HfSiO_4氧空位的钝化作用要优于F离子。
用第一性原理系统研究了Cl、Ge和B杂质对铪基高k栅介质性能的影响，对观测到的实验现象进行了很好的理论解释。原子层淀积工艺带来的Cl残留杂质对HfO_2高k栅介质电学特性将产生影响。分析表明，替代位的Cl残留杂质在MOS结构中是一个可充放电的缺陷，会造成MOS结构滞回电压的增大；间隙位的Cl残留扎在在MOS结构中是负的固定电荷，会造成MOS结构平带电压的正偏。Cl残留杂质对HfSiO_4高k栅介质电学性能的影响，与其在HfO_2的作用相类似。Ge原子从衬底中扩散进入HfO_2介质，可形成3种缺陷，即V_3Ge、V_4Ge和Ge间隙缺陷。在HfO_2／TiN金属栅结构的费密能级体系下，由于Ge缺陷在各个情况下基本都带负电，Ge缺陷在HfO_2／Ge界面总体表现为负的固定电荷，导致MOS结构的平带电压正向漂移。
硼在HfO_2高k栅介质中以2种状态存在，即间隙B缺陷和V_3B缺陷。对于+1价的间隙B缺陷来说，其在HfO_2的带隙中引入了两个带隙态，分别为相对于价带顶2．53 eV和相对于导带底0．26 eV。在pMOSFET工作条件下，空穴经衬底价带注入到HfO_2的价带中，因此，后一个带隙态不会造成太大的影响。但是，第一个带隙态在Si的价带和HfO_2的价带之间，在一定浓度的间隙B缺陷的存在下，电子可以沿着这个能级从衬底流向栅极，即产生Trap-Assisted Tunneling。因此会对MOS结构的栅极漏电流造成大的影响。首次在理论上给出了高k栅介质中B杂质对pMOSFET阈值电压不稳定性影响的完整解释。扩散到HfO_2介质中的硼在pMOSFET的工作条件下，永远是带正电的，因此把体系的阈值电压往负方向漂移，增大了整个器件的开启电压。同时，当pMOSFET不工作的时候，由于衬底在没有栅电压时，电子是多子，这些硼缺陷又会释放掉正电荷，又使器件的开启电压有一定的下降。
Along with the development of integrated circuit,Moore's Law is driving thescaling down of the basic element of integrated circuit,which is calledmetal-oxide-semiconductor field effect transistor (MOSFET).In the principle ofscaling down,we have to reduce the thickness of gate oxide with a scale of l/k atevery technology node.With the continuous scaling down of MOSFET,the thicknessof gate oxide is going to its physical limit.As it is not possible to reduce the thicknessof gate oxide anymore,we have to choose a dielectric with higher dielectric constant(High-k dielectrics) in order to maintain the gate capacitance.According to theproblems in the practical usage of high-k dielectrics,we investigate the high-kdielectrics in advanced CMOS devices with experimental and theoretical method.Oneside,we use atomic layser deposition and molecular bean method to deposit highquality Al_2O_3、HfO_2、HfxAl_yO_z、single crystalline Gd_2O_3 and Nd_2O_3 high-k dielectrics,and systematically study the process optimization,material and electrical properties;on the other side,within the framework of first priciples calculation,we investigatethe impact of native defects and impurities on material and electrical properties ofhafnium based high-k dielectrics.The conclusions obtained in this thesis are of highacademically value for the applications of high-k dielectrics in advanced CMOSdevices.
In chapter 1,we successfully fabricate high quality epitaxial single crystallineGd_2O_3 and Nd_2O_3 on Si(100).After forming gas treatment (for tungsten metal gate) or“Gate last”forming gas treatment (for Pt metal gate),we are able to passivate theinterface states existing between single crystalline oxide and silicon substrate,andreduce the leakage through gate and interface state density.According to the electricalanalysis,the single crystalline oxide on silicon exhibit good electrical properties:(1)the dielectrics constant of Gd_2O_3 is estimated to 21.5;(2) the oxide exhibit very goodinsulating capability.At the Equivalent Oxide Thickness of 1.4 nm,the gate leakageobtained is around 5.69×10~(-6) A/cm~2,which is much lower than the requirement of MOSFET for low power application predicated by International Technology Roadmapfor Semiconductor;(3) the hysteresis of Gd_2O_3/Si(100) MOS structure is in the rangeof 10 mV and the interface state density is estimated in the level of 10~(11) cm~(-2)eV~(-1).Moreover,we develop a method for estimation of near interface oxide traps (NIOT) insingle crystalline oxide.With the help of quasistatic C-V curve,we are able to extractNIOT by electrical method.The NIOT in Nd_2O_3/Si(111) MOS structure is around3.75×10~(12) cm~(-2).
In chapter 2,one side,we successfully deposit the Al_2O_3,HfO_2 and Hf_xAl_yO_zunder the framework of atomic layer deposition,and optimize the processes fordielectric deposition.The frequency dispersion and interface state density of HfAlO_(3.5)high-k dielectrics on Si(100) are investigated from 1 kHz to 100 kHz.According tothe electrical analysis,the MOS capacitance density is reduced from 0.73μF/cm~2 to0.71μF/cm~2 because of parastic resistance.The strechout at -0.5 V of C-Vcharacteristics indicates the existing of slow interface states.Under the framework ofTerman method,the interface density of Al/HfAlO_(3.5)/Si(100) MOS structure at 100kHz is estimated to be around 5×10~(11) cm~(-2)eV~(-1) and1×10~(12) cm~(-2)eV~(-1),and this valueis further confirmed by Hill-Coleman method;on the other side,in order to fabricatehigh quality Al_2O_3 high-k dielectrics on GaAs with atomic layer deposition,wepropose a new surface passivation method for GaAs surface,and with this method,the reoxidation of GaAs surface during atomic layer deposition of Al_2O_3 is greatlyinhibited.Moreover,this method can also remove elemental As on GaAs surfaceaccording to XPS analysis.As a result,the accumulation capacitance density ofAl/Al_2O_3/GaAs MOS structure is greatly increased.
In chapter 4,we study the passivation mechanism of F to oxygen vacancy ofhafnium oxide.According to our results,oxygen vacancy introduces gap states in theband gap of HfO_2 and is the source of Trap-Assisted Tunneling or Poole-FrenkelTunneling.After F goes into oxygen vacancy,it can replace the effects of missingoxygen at that place,and by the p-d interaction of F 2p orbital and Hf 5d orbital,F areable to push the gap state of Hf 5d orbital at oxygen vacancy to the conduction bandof hafnium oxide.As a result,F passivates the oxygen vacancy completely.Then,we compare the passivation effect of fluorine in HfO_2 and HfSiO_4.In HfSiO_4,F gets theelectron from hafnium and push the electron from silicon back to the Si 2p orbitalbecause of difference of capabilility to donate electrons.Thus,the silicon around Fhas 7 electrons in its outshell and results in the failure of passivation of oxygenvacancy.In the lateral parts of this chapter,we compare the passivation effects of Fand N to the oxygen vacancy of HfSiO_4.Based on our calculation results,F at oxygenvacancy is better than N at the reduction of gate leakage;on the other hand,F atoxygen vacancy is a rechargeable defects when the gate voltage is sweeping while Nonly serves as negative fixed charge.At this point,N is better than F.Consideringthese two points,N is better than F for the passivation of oxygen vacancy in HfSiO_4.
In chapter 5,we study the degradation mechanism of Cl、Ge and B impurities onelectrical performance of hafnium based high-k dielectrics.(1)Cl residue in HfO_2 andHfSiO_4 will be negative fixed charge and rechargeable defects depending on thespatial location of Cl in HfO_2 and HfSiO_4 lattice,and it can explain all theexperimental phenomenon observed by various groups;(2)according to the threekinds of Ge defect in HfO_2(V_3Ge,V_4Ge and interstitial Ge),we are able to explainthe experimental results such as positive flatband voltage shift,enlarged leakagecurrent and C-V hysteresis induced by Ge defects,and with the help of theseconclusions;(3)+1 charged interstitial B introduces two gap states in band gap,andone is about 2.53 eV above HfO_2 VBM which can cause Trap-Assisted Tunneling.And moreover,we also systematically explain the mechanism of B induce thresholdvoltage instability of pMOSFET.When pMOSFET is under negative bias,B ispositively charged,which will cause the threshold voltage of transistor towardnegative;on the other hand,when pMOSFET is not biased,B will partially releasethese positive charge,which recover the threshold voltage partially.
本文首先用分子束外延的方法在Si(100)上外延了高质量的单晶Gd_2O_3和Nd_2O-3高k介质。采用W金属栅和Pt金属栅，通过Forming Gas退火以及的“GateLast”Forming Gas工艺，我们成功地钝化了在单晶高介电常数介质和Si衬底之间存在的界面态，大大地降低了栅极漏电流和界面态密度。经过工艺优化的单晶Gd_2O_3高k栅介质具有很好的电学性能：(1)获得的Gd_2O_3的介电常数为21．5；(2)制备的单晶Gd_2O-3表现出了极好的绝缘性能，其室温漏电流为5．69×10~(-6)A／cm~2(EOT=1．4 nm)，远低于国际半导体技术蓝图对2010年低功耗晶体管栅极漏电流的要求；(3)Gd_2O_3／Si(100)结构的C-V滞回电压可以降低到10 mV以内，界面态密度降到在10~(11)cm~(-2)eV~(-1)量级；研究了单晶Nd_2O_3栅介质／Si的近界面氧化层缺陷(NIOT)。利用低频C-V特性曲线，通过电学方法提取了NIOT。研究发现Nd_2O_3／Si(111)结构NIOT的密度为3．75×10~(12)cm~(-2)，并利用G-f法对近界面氧化层缺陷的测量进行了验证；
采用先进的原子层淀积工艺制备了Al_2O_3、HfO_2和HfAlO_(3．5)高k栅介质，优化了其生长工艺。在Si(100)衬底上制备了HfAlO_(3．5)高k栅介质，研究了1 kHz到100 kHz HfAlO_(3．5)高k栅介质的频率耗散特性。发现由于寄生电阻的关系，随着频率的上升，其MOS电容密度从0．73μF／cm~2下降到0．71μF／cm~2。在-0．5 V附近的C-V特性曲线存在扭结，表明有一定密度的慢界面态存在。在100 kHz下测定了A1／HfAlO_(3．5)／Si(100)MOS结构电容的高频C-V特性曲线，然后用Terman方法获得了Si禁带中央附近的界面态密度为5×10~(11)cm~(-2)eV~(-1)到1×10~(12)cm~(-2)eV~(-1)之间，并用Hill-Coleman测量方法进行了验证。
为了在GaAs衬底上原子层淀积高质量的A1_2O_3高k栅介质，提出了一种新的GaAs表面钝化方法，有效地抑制了GaAs衬底上原子层淀积Al_2O_3的过程中发生的氧化反应。即首先对GaAs表面硫化，然后把硫化的GaAs在500℃下的NH_3氛围下热处理5分钟。结果得到了稳定的氮化的表面，抑制了原子层淀积生长过程中氧化物前驱体对GaAs表面的氧化，同时也去除了对MOS器件电学性能产生严重影响的GaAs表面的单质As，极大地提升了Al／Al_2O_3／GaAs结构的积累电容密度。
研究了氧空位对Hf基栅介质原子结构和能带结构的影响。从能带结构发现，氧空位在HfO_2的禁带中央引入了带隙态，成为Trap-Assisted Tunneling或者Poole-Frenkel Tunneling等导电机制中的缺陷能级。分析表明，F离子进入氧空位以后，取代了原来氧离子的作用，通过F离子的2p轨道和Hf离子的5d轨道的p-d interaction造成轨道杂化，由于氟原子的电负性大于氧原子，把原来的Hf5d轨道上的带隙态推到了二氧化铪的导带以上，从来完全钝化了二氧化铪中的氧空位。从理论上解释了实验中发现的F离子对HfO_2氧空位的钝化能力。研究发现F离子在HfO_2和HfSiO_4介质中存在不同的钝化作用机理。在HfSiO_4中，由于Si和Hf的电正性的差异，在氧空位中的F接受来自于Hf的电子，而把来自于Si 2p轨道的电子推回到Si的2p轨道中，造成了具有7个核外电子的Si离子。这个Si离子的存在，造成了F离子对HfSiO_4的氧空位不具有钝化作用。
分析比较了F离子和N离子对HfSiO_4／Si结构在栅电压作用下氧空位的钝化效果。研究发现，在漏电流方面，HfSiO_4基MOS结构中F离子对氧空位的钝化优于N离子对氧空位的钝化。但是，当栅极电压变化时，F离子在氧空位中会引起其附近Si离子的充放电。这是通常意义上我们所说的慢界面态，而N则仅仅是负的固定电荷。由于界面态对器件性能退化的作用远大于固定电荷的影响，因此，N离子对HfSiO_4氧空位的钝化作用要优于F离子。
用第一性原理系统研究了Cl、Ge和B杂质对铪基高k栅介质性能的影响，对观测到的实验现象进行了很好的理论解释。原子层淀积工艺带来的Cl残留杂质对HfO_2高k栅介质电学特性将产生影响。分析表明，替代位的Cl残留杂质在MOS结构中是一个可充放电的缺陷，会造成MOS结构滞回电压的增大；间隙位的Cl残留扎在在MOS结构中是负的固定电荷，会造成MOS结构平带电压的正偏。Cl残留杂质对HfSiO_4高k栅介质电学性能的影响，与其在HfO_2的作用相类似。Ge原子从衬底中扩散进入HfO_2介质，可形成3种缺陷，即V_3Ge、V_4Ge和Ge间隙缺陷。在HfO_2／TiN金属栅结构的费密能级体系下，由于Ge缺陷在各个情况下基本都带负电，Ge缺陷在HfO_2／Ge界面总体表现为负的固定电荷，导致MOS结构的平带电压正向漂移。
硼在HfO_2高k栅介质中以2种状态存在，即间隙B缺陷和V_3B缺陷。对于+1价的间隙B缺陷来说，其在HfO_2的带隙中引入了两个带隙态，分别为相对于价带顶2．53 eV和相对于导带底0．26 eV。在pMOSFET工作条件下，空穴经衬底价带注入到HfO_2的价带中，因此，后一个带隙态不会造成太大的影响。但是，第一个带隙态在Si的价带和HfO_2的价带之间，在一定浓度的间隙B缺陷的存在下，电子可以沿着这个能级从衬底流向栅极，即产生Trap-Assisted Tunneling。因此会对MOS结构的栅极漏电流造成大的影响。首次在理论上给出了高k栅介质中B杂质对pMOSFET阈值电压不稳定性影响的完整解释。扩散到HfO_2介质中的硼在pMOSFET的工作条件下，永远是带正电的，因此把体系的阈值电压往负方向漂移，增大了整个器件的开启电压。同时，当pMOSFET不工作的时候，由于衬底在没有栅电压时，电子是多子，这些硼缺陷又会释放掉正电荷，又使器件的开启电压有一定的下降。
Along with the development of integrated circuit,Moore's Law is driving thescaling down of the basic element of integrated circuit,which is calledmetal-oxide-semiconductor field effect transistor (MOSFET).In the principle ofscaling down,we have to reduce the thickness of gate oxide with a scale of l/k atevery technology node.With the continuous scaling down of MOSFET,the thicknessof gate oxide is going to its physical limit.As it is not possible to reduce the thicknessof gate oxide anymore,we have to choose a dielectric with higher dielectric constant(High-k dielectrics) in order to maintain the gate capacitance.According to theproblems in the practical usage of high-k dielectrics,we investigate the high-kdielectrics in advanced CMOS devices with experimental and theoretical method.Oneside,we use atomic layser deposition and molecular bean method to deposit highquality Al_2O_3、HfO_2、HfxAl_yO_z、single crystalline Gd_2O_3 and Nd_2O_3 high-k dielectrics,and systematically study the process optimization,material and electrical properties;on the other side,within the framework of first priciples calculation,we investigatethe impact of native defects and impurities on material and electrical properties ofhafnium based high-k dielectrics.The conclusions obtained in this thesis are of highacademically value for the applications of high-k dielectrics in advanced CMOSdevices.
In chapter 1,we successfully fabricate high quality epitaxial single crystallineGd_2O_3 and Nd_2O_3 on Si(100).After forming gas treatment (for tungsten metal gate) or“Gate last”forming gas treatment (for Pt metal gate),we are able to passivate theinterface states existing between single crystalline oxide and silicon substrate,andreduce the leakage through gate and interface state density.According to the electricalanalysis,the single crystalline oxide on silicon exhibit good electrical properties:(1)the dielectrics constant of Gd_2O_3 is estimated to 21.5;(2) the oxide exhibit very goodinsulating capability.At the Equivalent Oxide Thickness of 1.4 nm,the gate leakageobtained is around 5.69×10~(-6) A/cm~2,which is much lower than the requirement of MOSFET for low power application predicated by International Technology Roadmapfor Semiconductor;(3) the hysteresis of Gd_2O_3/Si(100) MOS structure is in the rangeof 10 mV and the interface state density is estimated in the level of 10~(11) cm~(-2)eV~(-1).Moreover,we develop a method for estimation of near interface oxide traps (NIOT) insingle crystalline oxide.With the help of quasistatic C-V curve,we are able to extractNIOT by electrical method.The NIOT in Nd_2O_3/Si(111) MOS structure is around3.75×10~(12) cm~(-2).
In chapter 2,one side,we successfully deposit the Al_2O_3,HfO_2 and Hf_xAl_yO_zunder the framework of atomic layer deposition,and optimize the processes fordielectric deposition.The frequency dispersion and interface state density of HfAlO_(3.5)high-k dielectrics on Si(100) are investigated from 1 kHz to 100 kHz.According tothe electrical analysis,the MOS capacitance density is reduced from 0.73μF/cm~2 to0.71μF/cm~2 because of parastic resistance.The strechout at -0.5 V of C-Vcharacteristics indicates the existing of slow interface states.Under the framework ofTerman method,the interface density of Al/HfAlO_(3.5)/Si(100) MOS structure at 100kHz is estimated to be around 5×10~(11) cm~(-2)eV~(-1) and1×10~(12) cm~(-2)eV~(-1),and this valueis further confirmed by Hill-Coleman method;on the other side,in order to fabricatehigh quality Al_2O_3 high-k dielectrics on GaAs with atomic layer deposition,wepropose a new surface passivation method for GaAs surface,and with this method,the reoxidation of GaAs surface during atomic layer deposition of Al_2O_3 is greatlyinhibited.Moreover,this method can also remove elemental As on GaAs surfaceaccording to XPS analysis.As a result,the accumulation capacitance density ofAl/Al_2O_3/GaAs MOS structure is greatly increased.
In chapter 4,we study the passivation mechanism of F to oxygen vacancy ofhafnium oxide.According to our results,oxygen vacancy introduces gap states in theband gap of HfO_2 and is the source of Trap-Assisted Tunneling or Poole-FrenkelTunneling.After F goes into oxygen vacancy,it can replace the effects of missingoxygen at that place,and by the p-d interaction of F 2p orbital and Hf 5d orbital,F areable to push the gap state of Hf 5d orbital at oxygen vacancy to the conduction bandof hafnium oxide.As a result,F passivates the oxygen vacancy completely.Then,we compare the passivation effect of fluorine in HfO_2 and HfSiO_4.In HfSiO_4,F gets theelectron from hafnium and push the electron from silicon back to the Si 2p orbitalbecause of difference of capabilility to donate electrons.Thus,the silicon around Fhas 7 electrons in its outshell and results in the failure of passivation of oxygenvacancy.In the lateral parts of this chapter,we compare the passivation effects of Fand N to the oxygen vacancy of HfSiO_4.Based on our calculation results,F at oxygenvacancy is better than N at the reduction of gate leakage;on the other hand,F atoxygen vacancy is a rechargeable defects when the gate voltage is sweeping while Nonly serves as negative fixed charge.At this point,N is better than F.Consideringthese two points,N is better than F for the passivation of oxygen vacancy in HfSiO_4.
In chapter 5,we study the degradation mechanism of Cl、Ge and B impurities onelectrical performance of hafnium based high-k dielectrics.(1)Cl residue in HfO_2 andHfSiO_4 will be negative fixed charge and rechargeable defects depending on thespatial location of Cl in HfO_2 and HfSiO_4 lattice,and it can explain all theexperimental phenomenon observed by various groups;(2)according to the threekinds of Ge defect in HfO_2(V_3Ge,V_4Ge and interstitial Ge),we are able to explainthe experimental results such as positive flatband voltage shift,enlarged leakagecurrent and C-V hysteresis induced by Ge defects,and with the help of theseconclusions;(3)+1 charged interstitial B introduces two gap states in band gap,andone is about 2.53 eV above HfO_2 VBM which can cause Trap-Assisted Tunneling.And moreover,we also systematically explain the mechanism of B induce thresholdvoltage instability of pMOSFET.When pMOSFET is under negative bias,B ispositively charged,which will cause the threshold voltage of transistor towardnegative;on the other hand,when pMOSFET is not biased,B will partially releasethese positive charge,which recover the threshold voltage partially.
引文
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