超高频RFID标签芯片中低功耗模拟电路关键技术研究
摘要
超高频（Ultra High Frequency, UHF）射频识别（Radio Frequency Identification,RFID）技术是一种通过无线方式实现远距离目标物品识别的自动识别技术，也是物联网技术中的一个重要组成部分，因此具有很好的发展前景和研究价值。本文以UHF RFID标签芯片的低功耗模拟电路设计关键技术以及其他相关模拟电路的低功耗设计为研究课题，对低功耗高精度时钟产生电路技术、高效率整流电路设计技术、低功耗高可靠性ASK（amplitude shift keying）解调电路设计技术和低电压亚阈值锁存比较器的设计与优化等关键技术展开研究。论文的主要创新性研究成果如下：
1.论文研究了低功耗时钟产生电路的频率补偿机制，提出了一种具有工艺和温度自适应频率补偿机制的高精度低功耗时钟产生电路。后仿结果显示，中心时钟频率为1.92MHz，电路平均功耗为1.45μW，在考虑温度变化（-40~85°C）和工艺偏差（TT/FF/SS）的因素下，时钟频率的最大偏差约为±5.8%。与其他低功耗时钟电路相比，本文提出的电路在功耗和频率精度上达到了更好的折中，对于RFID标签芯片及其他低功耗系统具有重要应用价值。
2.研究了基于二极管检波的ASK解调电路中均值产生电路的结构设计，提出了一种基于动态栅极偏置MOS管的均值产生电路。该电路在保证ASK解调电路具有足够大的输入动态范围的同时，有效的减少了解调电路中的无源器件。仿真和测试结果系统的验证了该电路的可靠性。
3.针对整流电路设计技术，分析了双输出整流电路的设计与优化方法，基于该优化方法设计实现了一款双输出Dickson整流电路，并进行了测试。针对测试中发现的问题，设计了一款双差分整流电路，该设计可以有效解决Dickson整流电路测试中发现的天线“盲区”问题，且仿真得出的整流效率可达到72%。
4.基于以上研究成果，设计实现了两款符合ISO/IEC18000-6C协议的标签芯片，其中基于Dickson整流电路的标签芯片已经通过流片测试，灵敏度达到-13dBm，达到商用产品水平；另一款为基于双差分整流电路与具有PVT自适应补偿机制的高精度时钟电路的标签芯片，仿真结果显示，预计灵敏度可达到-16dBm。
5.针对物流领域的特殊应用需求，论文在通用标签芯片的研究基础上提出了一款面向港口、物流应用的特种标签芯片设计，该标签芯片可实现对运输过程中的货柜开启次数的全程监控，同时也兼容ISO/IEC18000-6C协议。论文系统的提出了该标签芯片的一些特有的模块设计，包括：低功耗锁离合状态监控电路、电源管理电路和基带处理器。论文通过仿真验证了各个模块的功能，该设计扩展了RFID标签芯片的功能。
6.低电压锁存比较器通常是RFID标签芯片和传感器之间的接口电路的重要模块，论文研究了低电压锁存比较器设计技术，提出了亚阈值锁存比较器设计中元件尺寸的优化设计方法，设计了一种低电压全摆幅锁存比较器电路。仿真结果验证了论文所提出的优化设计方法，且该电路的速度明显优于其他全摆幅比较器电路。
7.论文研究了低功耗传感器唤醒电路中的包络信号检测方法，提出了一种低功耗包络信号下降沿检测电路，该电路能够通过检测输入包络信号的下降沿来将其转换为数字信息，且不需要固定的偏置电流，可有效降低传感器的待机功耗。
Ultra high frequency (UHF) radio frequency identification (RFID) is an advancedauto-identification technology which can remotely identify the targets by employingwireless communication. UHF RFID technology is also an important part of theInternet-of-Things (IOT). Therefore, it has a great prospect and research value. Thisdissertation focuses on the analog and RF front-end of UHF RFID transponders andother relevant circuits, and the main research contributions are as follows:
1. Frequency compensation mechanisms for low power oscillator are researched,and an ultra-low-power oscillator with process and temperature compensation isproposed. According to the post-simulation results, the center frequency is1.92MHz, and the power consumption is1.45μW. Considering the temperature(-40~85°C) and process (TT, FF, SS) variation, the maximum frequencyvariation of the proposed oscillator is±5.8%. Compared with other low poweroscillator structures, the proposed oscillator achieves outstanding balancebetween clock accuracy and power consumption. Therefore, this circuit issignificant to RFID transponder chip and other low power systems.
2. Design of the average generator in ASK demodulator is researched, and a novelaverage generator based on an adaptively gate-biased MOS transistor isproposed. This design guarantees that the input dynamic range of the ASKdemodulator is large enough, and effectively reduces passive devices in thedemodulator circuit at the same time. Simulations and Measurement resultssystematically validate that the proposed circuit achieves excellent reliability.
3. The design and optimization method of dual-output rectifier is analysed. Adual-output Dickson rectifier is implemented and measured. To address theissues exposed in the measurement, a dual-differential rectifier is designed. Thiscircuit structure can effectively avoid the “deadzone” which is observed in themeasurement of Dickson rectifier. The power conversion efficiency reaches72%according to the simulation results.
4. Based on the above research results, two tag chips in compliance withISO/IEC18000-6C protocol have been implemented. One of them is based on aDickson rectifier, and has already been fabricated. Measurement results show that the sensitivity of the tag chip is-13dBm, which reaches the performance ofcommercial products. The other one is based on the dual-differential rectifierand the low power oscillator with process and temperature compensation.Simulation results predict that the sensitivity of the tag chip reaches-16dBm.
5. Based on the special application requirements in logistics area, this paper alsoproposes the design of a semi-passive UHF RFID tag IC with freight securitymonitoring function. This tag can record the number of times a container hasbeen opened during transport and is compatible with ISO/IEC18000-6C protocol.Several key modules are proposed, such as the switch-state monitoring unit, thepower management unit and the baseband processor. The proposed modules arevalidated by simulations, and the function of RFID transponder is effectivelyextended.
6. Low voltage latch-based comparator is a key module in the interface circuitbetween RFID tag and sensor. This paper researches the design techniques oflow voltage latch-based comparators, presents the design of a low voltagerail-to-rail comparator and derives optimal transistor size ratios for bothconventional latch-based and the proposed comparators which operate intransistor sub-threshold region. The proposed optimization method is validatedby simulations and the presented circuit is signicantly faster than existingrail-to-rail comparator designs in ultra-low voltage operation.
7. The methods of envelope signal detection in ultra-low power sensor wake-upcircuits are researched, and a novel envelope edge detector is proposed. Theproposed circuit extracts digital bits by detecting the falling edge of the envelopesignal. The proposed circuit needs no fixed bias current, which can significantlyreduce the power consumption of sensor in standby mode.
1.论文研究了低功耗时钟产生电路的频率补偿机制，提出了一种具有工艺和温度自适应频率补偿机制的高精度低功耗时钟产生电路。后仿结果显示，中心时钟频率为1.92MHz，电路平均功耗为1.45μW，在考虑温度变化（-40~85°C）和工艺偏差（TT/FF/SS）的因素下，时钟频率的最大偏差约为±5.8%。与其他低功耗时钟电路相比，本文提出的电路在功耗和频率精度上达到了更好的折中，对于RFID标签芯片及其他低功耗系统具有重要应用价值。
2.研究了基于二极管检波的ASK解调电路中均值产生电路的结构设计，提出了一种基于动态栅极偏置MOS管的均值产生电路。该电路在保证ASK解调电路具有足够大的输入动态范围的同时，有效的减少了解调电路中的无源器件。仿真和测试结果系统的验证了该电路的可靠性。
3.针对整流电路设计技术，分析了双输出整流电路的设计与优化方法，基于该优化方法设计实现了一款双输出Dickson整流电路，并进行了测试。针对测试中发现的问题，设计了一款双差分整流电路，该设计可以有效解决Dickson整流电路测试中发现的天线“盲区”问题，且仿真得出的整流效率可达到72%。
4.基于以上研究成果，设计实现了两款符合ISO/IEC18000-6C协议的标签芯片，其中基于Dickson整流电路的标签芯片已经通过流片测试，灵敏度达到-13dBm，达到商用产品水平；另一款为基于双差分整流电路与具有PVT自适应补偿机制的高精度时钟电路的标签芯片，仿真结果显示，预计灵敏度可达到-16dBm。
5.针对物流领域的特殊应用需求，论文在通用标签芯片的研究基础上提出了一款面向港口、物流应用的特种标签芯片设计，该标签芯片可实现对运输过程中的货柜开启次数的全程监控，同时也兼容ISO/IEC18000-6C协议。论文系统的提出了该标签芯片的一些特有的模块设计，包括：低功耗锁离合状态监控电路、电源管理电路和基带处理器。论文通过仿真验证了各个模块的功能，该设计扩展了RFID标签芯片的功能。
6.低电压锁存比较器通常是RFID标签芯片和传感器之间的接口电路的重要模块，论文研究了低电压锁存比较器设计技术，提出了亚阈值锁存比较器设计中元件尺寸的优化设计方法，设计了一种低电压全摆幅锁存比较器电路。仿真结果验证了论文所提出的优化设计方法，且该电路的速度明显优于其他全摆幅比较器电路。
7.论文研究了低功耗传感器唤醒电路中的包络信号检测方法，提出了一种低功耗包络信号下降沿检测电路，该电路能够通过检测输入包络信号的下降沿来将其转换为数字信息，且不需要固定的偏置电流，可有效降低传感器的待机功耗。
Ultra high frequency (UHF) radio frequency identification (RFID) is an advancedauto-identification technology which can remotely identify the targets by employingwireless communication. UHF RFID technology is also an important part of theInternet-of-Things (IOT). Therefore, it has a great prospect and research value. Thisdissertation focuses on the analog and RF front-end of UHF RFID transponders andother relevant circuits, and the main research contributions are as follows:
1. Frequency compensation mechanisms for low power oscillator are researched,and an ultra-low-power oscillator with process and temperature compensation isproposed. According to the post-simulation results, the center frequency is1.92MHz, and the power consumption is1.45μW. Considering the temperature(-40~85°C) and process (TT, FF, SS) variation, the maximum frequencyvariation of the proposed oscillator is±5.8%. Compared with other low poweroscillator structures, the proposed oscillator achieves outstanding balancebetween clock accuracy and power consumption. Therefore, this circuit issignificant to RFID transponder chip and other low power systems.
2. Design of the average generator in ASK demodulator is researched, and a novelaverage generator based on an adaptively gate-biased MOS transistor isproposed. This design guarantees that the input dynamic range of the ASKdemodulator is large enough, and effectively reduces passive devices in thedemodulator circuit at the same time. Simulations and Measurement resultssystematically validate that the proposed circuit achieves excellent reliability.
3. The design and optimization method of dual-output rectifier is analysed. Adual-output Dickson rectifier is implemented and measured. To address theissues exposed in the measurement, a dual-differential rectifier is designed. Thiscircuit structure can effectively avoid the “deadzone” which is observed in themeasurement of Dickson rectifier. The power conversion efficiency reaches72%according to the simulation results.
4. Based on the above research results, two tag chips in compliance withISO/IEC18000-6C protocol have been implemented. One of them is based on aDickson rectifier, and has already been fabricated. Measurement results show that the sensitivity of the tag chip is-13dBm, which reaches the performance ofcommercial products. The other one is based on the dual-differential rectifierand the low power oscillator with process and temperature compensation.Simulation results predict that the sensitivity of the tag chip reaches-16dBm.
5. Based on the special application requirements in logistics area, this paper alsoproposes the design of a semi-passive UHF RFID tag IC with freight securitymonitoring function. This tag can record the number of times a container hasbeen opened during transport and is compatible with ISO/IEC18000-6C protocol.Several key modules are proposed, such as the switch-state monitoring unit, thepower management unit and the baseband processor. The proposed modules arevalidated by simulations, and the function of RFID transponder is effectivelyextended.
6. Low voltage latch-based comparator is a key module in the interface circuitbetween RFID tag and sensor. This paper researches the design techniques oflow voltage latch-based comparators, presents the design of a low voltagerail-to-rail comparator and derives optimal transistor size ratios for bothconventional latch-based and the proposed comparators which operate intransistor sub-threshold region. The proposed optimization method is validatedby simulations and the presented circuit is signicantly faster than existingrail-to-rail comparator designs in ultra-low voltage operation.
7. The methods of envelope signal detection in ultra-low power sensor wake-upcircuits are researched, and a novel envelope edge detector is proposed. Theproposed circuit extracts digital bits by detecting the falling edge of the envelopesignal. The proposed circuit needs no fixed bias current, which can significantlyreduce the power consumption of sensor in standby mode.
引文
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