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基于MSC8144的H.264高清视频解码软件设计
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摘要
随着视频在无线领域的应用和高清视频越来越受欢迎,能提供更高视频质量和更高压缩效率的H.264/AVC应运而生。本文开发了H.264高清视频解码器。在MSC8144平台上,Smart OS调用4个1GHz的Core并行解码从上位机接收的1920x1080高清压缩码流,并传送到相关模块显示。本文论述了整个系统的设计方案和成果,着重论述了解码器主要模块的开发和优化,以及利用MSC8144平台提供的多种优化措施和内存分层特性提高解码器性能。
     第一章,介绍了相关背景,包括视频压缩原理,对当前主流的几个视频编码国际标准和DSP的发展状况进行了概述。
     第二章,讨论了多核MSC8144的结构特点和应用,包括MSC8144的核架构、存储系统、Cache和DMA访问模型、汇编指令集以及开发环境。
     第三章,详细介绍了H.264的关键技术,包括NAL设计的主要思想,VCL层的帧内预测、运动补偿、整数变换、上下文自适应的熵编码、环路滤波模块,另外还简要介绍了各个Profile的工具子集。
     第四章,本文的重点。针对MSC8144设计了系统方案和各模块方案。具体阐述了高清视频解码软件设计,包括Smart OS调用、码流接收模块、图像数据发送模块和解码模块,以及解码器主要模块插值、去块滤波、熵解码的开发,并设计了一定的优化措施。
     第五章,本文的总结。
Emerging applications like video over wireless channels and the increasing popularity of High Definition (HD) are requiring higher video quality and, at the same time, higher compression efficiency which H.264/AVC is capable to provide. In this paper, an implementation of H.264 high definition video decoder is presented. Based on MSC8144, the Smart OS calls 4 Cores, up to 1 GHz each, to parallel decode the high definition compressed bitstream with a resolution of 1920x1080, which is received from the host, and then the decoded video data is sent to display.
     Chapter 1 gives an overview of the background, including the principles of video compression, a short description of the exiting video coding standards and an introduction of the DSP development.
     Chapter 2 discusses the multicore architecture characteristics and applications of MSC8144 processor. It covers the core subsystem, memory hierarchy, cache and DMA data models, instruction set and the IDE CodeWarrior.
     Chapter 3 explains detailedly the H.264 video coding key techniques. The concept of NAL is defined. The intra prediction, motion compensation, integer transform, context adaptive entropy decoding and in-loop deblocking filtering are presented. In addition, different tool set for different Profile is described briefly.
     Chapter 4 is devoted to the most important part of this paper. System scheme and module design is given based on MSC8144. The software design of HD video decoder is focused. These include different modules: Smart OS scheduler, bitstream receiving, video data sending and decoding. Special interest is paid to interpolation process, deblocking filtering and entropy decoding, which are the kernels of decoder. Methods of improving the decoder are designed.
     Chapter 5 is the conclusion.
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