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无线传感网节点SoC芯片设计研究
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  • 英文篇名:A Study on Wireless Sensor Network Node SoC Chip Design
  • 作者:谢书珊 ; 吴宁 ; 陈鑫
  • 英文作者:XIE Shushan;WU Ning;CHEN Xin;Nanjing Research Institute of Electronics Technology;College of Electronic and Information Engineering,Nanjing University of Aeronautics and Astronautics;
  • 关键词:片上系统 ; 无线传感器 ; 射频 ; 模拟数字转换器 ; 基带信号处理
  • 英文关键词:SoC;;wireless sensor network;;RF;;ADC;;baseband circuit
  • 中文刊名:XDLD
  • 英文刊名:Modern Radar
  • 机构:南京电子技术研究所;南京航空航天大学电子信息工程学院;
  • 出版日期:2014-10-15
  • 出版单位:现代雷达
  • 年:2014
  • 期:v.36;No.287
  • 基金:江苏省科技支撑计划资助项目(BE2010003)
  • 语种:中文;
  • 页:XDLD201410017
  • 页数:6
  • CN:10
  • ISSN:32-1353/TN
  • 分类号:79-83+87
摘要
无线传感网终端设备的无线化、小型化,对其硬件电路的实现技术水平提出了越来越高的要求,其中传感器节点的核心部件——片上系统(SoC)技术,是当今的发展趋势之一。文中基于IEEE802.15.4规范要求,设计满足传输速率2 Mb/s、工作频率2.4 GHz等基本指标要求的无线传感网节点单芯片集成解决方案,并以此展开方案设计和关键技术的研究工作,实现了无线传感网节点SoC芯片方案的仿真验证。
        With the wirelessness and miniaturization of terminal equipment of wireless sensor networks,the demands for its hardware circuit implementation skills have become higher,in which the core components SoC technology of the sensor node is one of today's trends. Based on IEEE 802. 15. 4 specifications,wireless sensor network node monolithic chip integrated solution is designed to meet the transmission rate of 2 Mb /s,the iperating frequency 2. 4 GHz,and other basic indicators. Thus the program design and key technology research are conducted,and simulation validation of this design is realized.
引文
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