Low Temperature Deposition of High-k/Metal Gate Stacks on High-Sn Content (Si)GeSn-Alloys

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• 作者：C. Schulte-Braucks ; N. von den Driesch ; S. Glass ; A. T. Tiedemann ; U. Breuer ; A. Besmehn ; J.-M. Hartmann ; Z. Ikonic ; Q. T. Zhao ; S. Mantl ; D. Buca
• 刊名：ACS Applied Materials & Interfaces
• 出版年：2016
• 出版时间：May 25, 2016
• 年：2016
• 卷：8
• 期：20
• 页码：13133-13139
• 全文大小：583K
• 年卷期：0
• ISSN：1944-8252

文摘

(Si)GeSn is an emerging group IV alloy system offering new exciting properties, with great potential for low power electronics due to the fundamental direct band gap and prospects as high mobility material. In this Article, we present a systematic study of HfO₂/TaN high-k/metal gate stacks on (Si)GeSn ternary alloys and low temperature processes for large scale integration of Sn based alloys. Our investigations indicate that SiGeSn ternaries show enhanced thermal stability compared to GeSn binaries, allowing the use of the existing Si technology. Despite the multielemental interface and large Sn content of up to 14 atom %, the HfO₂/(Si)GeSn capacitors show small frequency dispersion and stretch-out. The formed TaN/HfO₂/(Si)GeSn capacitors present a low leakage current of 2 × 10^–8 A/cm² at −1 V and a high breakdown field of ∼8 MV/cm. For large Sn content SiGeSn/GeSn direct band gap heterostructures, process temperatures below 350 °C are required for integration. We developed an atomic vapor deposition process for TaN metal gate on HfO₂ high-k dielectric and validated it by resistivity as well as temperature and frequency dependent capacitance–voltage measurements of capacitors on SiGeSn and GeSn. The densities of interface traps are deduced to be in the low 10¹² cm^–2 eV^–1 range and do not depend on the Sn-concentration. The new processes developed here are compatible with (Si)GeSn integration in large scale applications.