基于递推法的CRC-32校验码并行改进算法
|
摘要
针对在CRC-32校验码生成方法中,固定电路成本高且缺乏灵活性,传统按位串行算法计算速度慢、查表法需要额外占用空间问题,提出了基于递推法的CRC-32校验码并行改进算法。该算法以递推法为基础,根据实际情况中不同的计算速度和占用空间的需求,计算出并行输入任意n位数据时CRC寄存器中新老数据之间的并行逻辑关系,并根据这一逻辑关系修改程序,从而达到在一定占用空间的限制下,最大程度提升运算速度的目的。仿真结果表明,改进算法存储空间小于查表法,有利于小型化、快速化的硬件实现。
In all of the CRC-32 check code generation methods, the fixed circuit has high cost and lack of flexibility. The traditional bit-wise serial algorithm is slow in calculation and the look-up table method requires extra space. This paper proposed a new improved parallel algorithm for CRC-32 check code based on recursive method for the limitation of firing environment. The algorithm is based on the recursive method. When arbitrary n-bit data is parallel input, the parallel logical relationship between the new and old data in the CRC register is calculated according to the different calculation speed and space requirements in actual situation. So as to achieve the purpose of maximizing the operation speed under the limitation of a certain space. The simulation results showed that the improved parallel algorithm for CRC-32 check code based on recursive method was faster than the bit-wise serial calculation method, and the took less storage space than the look-up table method, which would be beneficial to the miniaturization and rapid hardware implementation.
In all of the CRC-32 check code generation methods, the fixed circuit has high cost and lack of flexibility. The traditional bit-wise serial algorithm is slow in calculation and the look-up table method requires extra space. This paper proposed a new improved parallel algorithm for CRC-32 check code based on recursive method for the limitation of firing environment. The algorithm is based on the recursive method. When arbitrary n-bit data is parallel input, the parallel logical relationship between the new and old data in the CRC register is calculated according to the different calculation speed and space requirements in actual situation. So as to achieve the purpose of maximizing the operation speed under the limitation of a certain space. The simulation results showed that the improved parallel algorithm for CRC-32 check code based on recursive method was faster than the bit-wise serial calculation method, and the took less storage space than the look-up table method, which would be beneficial to the miniaturization and rapid hardware implementation.
引文
[1]王新梅,肖国振.纠错码—原理与方法[M].西安:西安电子科技大学出版社,2003.
[2]李永忠.通用并行CRC计算原理及其硬件实现方法[J].西北民族大学学报(自然科学版),2002,23(1):33-37.
[3]邹久朋,林瑶瑶,周建. CRC校验编程和硬件快速校验探讨[J].单片机与嵌入式系统应用,2009,9(4),76-78.
[4]瞿中,徐问之,袁威,等.CRC 算法在计算机网络通信中的应用[J].微机发展.2002,12(2):12-14.
[5]循环冗余校验码(CRC)计算[M].北京:清华大学出版社,2017.
[6]顾文斌,王怡,马莉.基于FPGA的CRC算法的实现[J].计算机与现代化,2008,153(5):111-113.
[7]张焱,任勇峰,齐蕾,等.基于FPGA的CRC校验算法的实现[J].电子器件,2012(2):42-44.
[8]时亚丽.基于FPGA的CRC32校验查找表算法的设计[J].山东工业技术,2016(10):215.
[2]李永忠.通用并行CRC计算原理及其硬件实现方法[J].西北民族大学学报(自然科学版),2002,23(1):33-37.
[3]邹久朋,林瑶瑶,周建. CRC校验编程和硬件快速校验探讨[J].单片机与嵌入式系统应用,2009,9(4),76-78.
[4]瞿中,徐问之,袁威,等.CRC 算法在计算机网络通信中的应用[J].微机发展.2002,12(2):12-14.
[5]循环冗余校验码(CRC)计算[M].北京:清华大学出版社,2017.
[6]顾文斌,王怡,马莉.基于FPGA的CRC算法的实现[J].计算机与现代化,2008,153(5):111-113.
[7]张焱,任勇峰,齐蕾,等.基于FPGA的CRC校验算法的实现[J].电子器件,2012(2):42-44.
[8]时亚丽.基于FPGA的CRC32校验查找表算法的设计[J].山东工业技术,2016(10):215.