12位100MSPS高速DAC设计
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摘要
随着计算机技术、多媒体技术、信号处理技术、微电子技术的迅速发展,先进的电子系统不断涌现,在现代先进的电子系统前端和后端都将应用数模转换器,而且需要更高的速度和分辨率。所以本文设计了一个12位100MSPS分段式电流舵型高速数模转换器。
本文介绍了数模转换器的基本结构和基本原理,介绍了当今数模转换的状况和发展动态,分析了电流、电压和电荷三种类型的数模转换器,对数模转换器静态参数和动态参数进行了具体的分析。通过对二进制码和温度计码结构的分析,综合考虑数模转换器的性能参数,选择了一种6+6,低6位二进制码高6位温度计码结构的电流舵型数模转换器。本文进行了详细的理论和实际问题的分析与解决,并给出了寄存器电路,温度译码电路,选通电路,锁存电路,时钟电路,基准源电路,电压电流转换电路,单位电流源阵列电路和开关阵列电路的设计方案和具体电路。通过对数模转换器各个模块的原理分析与结构设计,并对整体电路进行仿真,调试,版图绘制,完成了完整的数模转换器设计。
采用了本文设计的电路结构,得到了100MHZ采样频率,输入频率50MHZ,转换速度为2.82ns的12位数模转换器。而且微分线性误差小于0.6LSB,积分线性误差小于1.8LSB,SFDR 71.0dB,THD -82.0dB,SNR 70.1dB,SNDR 70.1dB,电路的最大功耗为188.1mW,电路的总体版图面积为3.78mm~2。
With the development of the computer, the multimedia, the signal processing and the microelectronic, the advanced electronic system comes forth continuously. The Digital-Analog Converter will be used in the front end and back end of the advanced electronic system and it needs the higher speed and resolution. This paper designs a 12b 100MSPS sectional coding current steering DAC.
This paper present a general introduction on D/A converter of basic structure and principle, study of domestic and aboard, the analysis of different converting type such as current converting, voltage converting and charge converting, and the analysis of static parameter and dynamic parameter of D/A converter. Based on the study of binary code D/A converter and thermometer code D/A converter, and the performance parameter of D/A converter, a 6+6, low 6b to be binary code and high 6b to be thermometer code, current steering D/A converter has been designed. Some of the basic design theory and technology are presented within this paper. To improve this D/A converter, some of the cell architectures, including register, thermometer decoding, gate circuit, latch, clock, reference voltage and current, current source array, switch array, have to be designded carefully. The details of these cells are described in this paper. Through the analysis of principle and the design of structure of each module, and the simulating, debugging and drawing of layout of D/A converter, it has completed the whole design of the D/A converter.
This architecture implements the 12 bit D/A converter and achieve a speed of 100MSPS, 50M input frequency, switching speed 2.82ns, DNL less than 0.6LSB, INL less than 1.8LSB. SFDR 71.0dB, THD -82.0dB, SNR 70.1dB, SNDR 70.1dB, the maximum power dissipation 188.1mW, and area is less than 3.78mm~2.
本文介绍了数模转换器的基本结构和基本原理,介绍了当今数模转换的状况和发展动态,分析了电流、电压和电荷三种类型的数模转换器,对数模转换器静态参数和动态参数进行了具体的分析。通过对二进制码和温度计码结构的分析,综合考虑数模转换器的性能参数,选择了一种6+6,低6位二进制码高6位温度计码结构的电流舵型数模转换器。本文进行了详细的理论和实际问题的分析与解决,并给出了寄存器电路,温度译码电路,选通电路,锁存电路,时钟电路,基准源电路,电压电流转换电路,单位电流源阵列电路和开关阵列电路的设计方案和具体电路。通过对数模转换器各个模块的原理分析与结构设计,并对整体电路进行仿真,调试,版图绘制,完成了完整的数模转换器设计。
采用了本文设计的电路结构,得到了100MHZ采样频率,输入频率50MHZ,转换速度为2.82ns的12位数模转换器。而且微分线性误差小于0.6LSB,积分线性误差小于1.8LSB,SFDR 71.0dB,THD -82.0dB,SNR 70.1dB,SNDR 70.1dB,电路的最大功耗为188.1mW,电路的总体版图面积为3.78mm~2。
With the development of the computer, the multimedia, the signal processing and the microelectronic, the advanced electronic system comes forth continuously. The Digital-Analog Converter will be used in the front end and back end of the advanced electronic system and it needs the higher speed and resolution. This paper designs a 12b 100MSPS sectional coding current steering DAC.
This paper present a general introduction on D/A converter of basic structure and principle, study of domestic and aboard, the analysis of different converting type such as current converting, voltage converting and charge converting, and the analysis of static parameter and dynamic parameter of D/A converter. Based on the study of binary code D/A converter and thermometer code D/A converter, and the performance parameter of D/A converter, a 6+6, low 6b to be binary code and high 6b to be thermometer code, current steering D/A converter has been designed. Some of the basic design theory and technology are presented within this paper. To improve this D/A converter, some of the cell architectures, including register, thermometer decoding, gate circuit, latch, clock, reference voltage and current, current source array, switch array, have to be designded carefully. The details of these cells are described in this paper. Through the analysis of principle and the design of structure of each module, and the simulating, debugging and drawing of layout of D/A converter, it has completed the whole design of the D/A converter.
This architecture implements the 12 bit D/A converter and achieve a speed of 100MSPS, 50M input frequency, switching speed 2.82ns, DNL less than 0.6LSB, INL less than 1.8LSB. SFDR 71.0dB, THD -82.0dB, SNR 70.1dB, SNDR 70.1dB, the maximum power dissipation 188.1mW, and area is less than 3.78mm~2.
引文
[1]G.B克雷伊顿.数据转换技术.北京:电子工业出版社,1987.
[2]J.J.Wikner,N.Tan.Modeling of CMOS Digital-to-Analog Converters for Telecommunication.IEEE Trans on Circuits and Systems Ⅱ,1999,46:489-490.
[3]J.Sevenhans,Z-Y Chang.A/D and D/A conversion for telecommunication.IEEE Circuits and devices,1998:216-223.
[4]高光天,徐振英.数模转换器应用技术.北京:科学出版社,2000.
[5]陈振初.发展我国数据转换电路的几点建议.微电子学,1998,28(4):233-235.
[6]许居衍,许世六.关于A/D与D/A转换器发展动向的一些思考.微电子学,1998,28(4):217-223.
[7]赵保经,蒋建飞.大规模集成电路数-模和模-数转换器设计原理(第一版).北京:科学出版社,1996.
[8]何艳红.8位高速D/A转换器设计研究:(硕士学位论文).成都:电子科技大学,2004.
[9]阎石.数字电子技术基础.北京:高等教育出版社,2002.
[10]Phillip E.Allen,Douglas R.Holberg著.CMOS模拟集成电路设计(第二版).冯军 李智群译.北京:电子工业出版社,2007.
[11]A.B.Grebene.Bipolar and MOS Analog Integrated Circuit Design.New York:Wiley,1984.
[12]D.H.Sheingold.Analog-Digital Conversion Handbook.Norwood,MA:Analog Devices,1972.
[13]B.Fotouhi,D.A.Hodges.High-Resolution A/D Conversion in MOS/LSI.IEEE J.Solid-State Circuits,1979,14:920-926,
[14]R.H.Charles,D.A.Hodges.Charge Circuits for Analog LSI.IEEE Trans.Circuits Syst,1978,25(7):490-497.
[15]Hassanadeh,M.R.Talebzadeh,J.Shoaei.A high-speed,current-steering digital-to-analog converter in 0.6μm cmos.Electronic circuit and systems,2002,9-12.
[16]Albiol,M.Gonzalez,J.L.Alarcon.Improved current source sizing for high-speed high-accuracy current-steering D/A converter.Circuit and systems,2003,17(10):837-839.
[17]Yonghua cong,Geiger,R.L.Formulation of INL and DNL jield estimation in current-steering D/A converter.ISCAS 2002 IEEE international symposium on,3:1959-1961.
[18]熊险峰.高速高精度十二位D/A转换器的研究与没计:(硕士学位论文).长沙:湖南大学,2003.
[19]梁仁光.8位100MSPS电流舵CMOS DAC的研究及其典型单元电路设计:(硕士学位论文).成都:电子科技大学,2005.
[20]D.Gilbert.Understanding D/A Accuracy Specs.Electronic Products,1981,24(3):61-63.
[21]M.J.M.Pelgrom,A.C.J.Duinmaijer,A.P.G.Welbers.Matching properties of MOS transistors.IEEE J.Solid-state Circuits,1998,24(10):1433-1439.
[22]Douglas Mercer.A 16-bit D/A Converter with increased SPURIOUS free Dynamic Range.IEEE Journal of solid-state circuits,1994,29(6):785-791.
[23]Marcel J.M.Pelgrom.A 10-bit 50-MHz CMOS D/A Converter with 75Ω Buffer.IEEE Journal of solid-state circuits,1990,25(6):732-741.
[24]Nasrollah Navid.A theory and an algorithm for analog Circuit Fault Diagnosis.IEEE TRANSATIONS ON CIRCUITS AND SYSTEMS,1979,26(7):440-457.
[25]Timothy N.Trick.Calculation of Parameter Values from Node Voltage Measurements.IEEE TRANSATIONS ON CIRCUITS AND SYSTEMS,1979,26(7):466-474.
[26]Chi-Hung Lin,Klaas Bult.A 10-b,500-MSample/s CMOS DAC in 0.6mm2.IEEE Journal of Solid-State Circuit,1998,33(12):451-455.
[27]A.Van den Bosch et al.Modeling and realization of high accuracy,high speed current-steering CMOS D/A converters.IEEE measurement,2000:123-128.
[28]Russ E.Radke,Aria Eshraghi,Terri S.Fiez.A 14-Bit Current-Mode ΣΔ DAC Based Upon Rotated Data Weighted Averaging.IEEE JOURNAL OF SOLID-STATE CIRCUITS,2000,35:320-326.
[29]Alex R.Bugeja,Bang-Sup song.A Self-Trimming 14-b 100-MS/s CMOS DAC.IEEE JOURNAL OF SOLID-STATE CIRCUITS,2000,35(12):512-516.
[30]Mikea P.Tiilikainen.A 14-bit 1.8-V 20-Mw 1-mm2 CMOS DAC.IEEE JOURNAL OF SOLID-STATE CIRCUITS,2001,36(7):154-159.
[31]Sungkyung Park,Gyudong film,Sin-Chong Park.A Digital-to-Analog Converter Based on Differential-Quad Switching.IEEE JOURNAL OF SOLID-ASTATE CIRCUIT,2002,37(10):651-657.
[32]Jiangdong Jiang,Edward K.F.Lee.A Low-Power Segmentde Nonlinear DAC-Based Direct Digital Frequency Synthesizer.IEEE JOURNAL OF SOLID-STATE CIRCUITS,2002,37(10):235-238.
[33]邱关源.电路.第四版.北京:高等教育出版社,2003.
[34]Alan Hastings.模拟电路版图的艺术.第二版.张为等译.北京:电子工业出版社,2007.
[35]阎石.数字电子电路.北京:中央广播电视大学出版社,1993.
[36]康光华.电子技术基础(数字部分 第三版).北京:高等教育出版社,1988.
[37]李士雄,丁康源.数字集成电子技术教程.北京:高等教育出版社,1993.
[38]Y.P.Tsividis,R.W.Ulmer.A CMOS Voltage Reference.IEEE J.of Solid-Skate Circuits,1978,13:324-330.
[39]G.C.M.Meijer,P.C.Schmall,K.van Zanlinge.A New Curvature-corrected Bandgap Reference.IEEE J.of Solid-State Circuit,1982,17:352-355.
[40]何捷,朱臻,王涛.一种具有温度补偿、高电源抑制比的带隙基准源.复旦大学学报(自然科学版),2001,40(1):70-86.
[41]朱樟明,杨银堂,朱磊等.一种高性能CMOS带隙电压基准源设计.半导体学报,2004,25(5):542-545.
[42]朱樟明,杨银堂,尹韬.一种新型低压高精度CMOS电流源.两安电子科技大学学报(自然科学版),32(2):174-178.
[43]王晗,叶青.0.18 μm数字CMOS工艺下的高增益运算放大器设计.半导体学报,2006,27:318-321.
[44]付永朝,杨银堂,朱樟明等.一种基于前馈补偿技术的高性能CMOS运算放大器.电子器件,2004,27(1):27-30.
[45]柳逊,闫娜,吴晓铁等.一种高性能运算放大器的设计.微电子学,2005,22(6):28-30.
[46]张奉江,吴贵能,张红等.一种高性能共模反馈CMOS运算放大器.微电子学,2007,37(3):407-410.
[47]李铁,郭立,白雪飞.低功耗满幅跨导CMOS运算放火器设计.微电子学与计算机,2007,24(8):102-105.
[48]高涛.高增益CMOS全差分运放的研究与设计:(硕士学位论文).成都:电子科技大学,2005.
[49]J.Jacob Wikner,Nianxiong Tan.Modeling of CMOS Digital-to-Analog Converters for Telecommunication.IEEE Transactions on Circutis and Systems Ⅱ,1999,46:123-126.
[50]Anne Van den Bosch.A 10-bit l-GSample/s Nyquist Current-steering CMOS D/A Converter.IEEE Journal of Solid-State Circuit,2001,36:223-225.
[51]Jose Bastos,Augusto M.Marques,Willy Sansen.A 12-Bit Intrinsic Accuracy High-Speed CMOS DAC.IEEE Journal of Solid-State Circuits,1998,33:265-269.
[52]H.Schouwenaars,D.Groeneveld,H.Termeer.A low-power stereo 16-bit CMOS D/A converter for digital audio.IEEE J.Solid-State Circuits,1988,23:614-619.
[53]贾新章.微电子技术概论.北京:国防工业出版社,1995.
[54]渡边诚,钱田邦博.超大规模集成电路设计-电路与版图设计.北京:科学出版社,1988.
[55]Yasuyuki Nakamura,Takahiro Miki,Atsushi Maeda.A 10-b 70-MS/s CMOS D/A Converter.IEEE Journal of Solid-State Circuits,1991,26:351-356.
[56]Alan Hastings.模拟电路版图的艺术(第二版).张为等译.北京:电子工业出版社,2007.
[2]J.J.Wikner,N.Tan.Modeling of CMOS Digital-to-Analog Converters for Telecommunication.IEEE Trans on Circuits and Systems Ⅱ,1999,46:489-490.
[3]J.Sevenhans,Z-Y Chang.A/D and D/A conversion for telecommunication.IEEE Circuits and devices,1998:216-223.
[4]高光天,徐振英.数模转换器应用技术.北京:科学出版社,2000.
[5]陈振初.发展我国数据转换电路的几点建议.微电子学,1998,28(4):233-235.
[6]许居衍,许世六.关于A/D与D/A转换器发展动向的一些思考.微电子学,1998,28(4):217-223.
[7]赵保经,蒋建飞.大规模集成电路数-模和模-数转换器设计原理(第一版).北京:科学出版社,1996.
[8]何艳红.8位高速D/A转换器设计研究:(硕士学位论文).成都:电子科技大学,2004.
[9]阎石.数字电子技术基础.北京:高等教育出版社,2002.
[10]Phillip E.Allen,Douglas R.Holberg著.CMOS模拟集成电路设计(第二版).冯军 李智群译.北京:电子工业出版社,2007.
[11]A.B.Grebene.Bipolar and MOS Analog Integrated Circuit Design.New York:Wiley,1984.
[12]D.H.Sheingold.Analog-Digital Conversion Handbook.Norwood,MA:Analog Devices,1972.
[13]B.Fotouhi,D.A.Hodges.High-Resolution A/D Conversion in MOS/LSI.IEEE J.Solid-State Circuits,1979,14:920-926,
[14]R.H.Charles,D.A.Hodges.Charge Circuits for Analog LSI.IEEE Trans.Circuits Syst,1978,25(7):490-497.
[15]Hassanadeh,M.R.Talebzadeh,J.Shoaei.A high-speed,current-steering digital-to-analog converter in 0.6μm cmos.Electronic circuit and systems,2002,9-12.
[16]Albiol,M.Gonzalez,J.L.Alarcon.Improved current source sizing for high-speed high-accuracy current-steering D/A converter.Circuit and systems,2003,17(10):837-839.
[17]Yonghua cong,Geiger,R.L.Formulation of INL and DNL jield estimation in current-steering D/A converter.ISCAS 2002 IEEE international symposium on,3:1959-1961.
[18]熊险峰.高速高精度十二位D/A转换器的研究与没计:(硕士学位论文).长沙:湖南大学,2003.
[19]梁仁光.8位100MSPS电流舵CMOS DAC的研究及其典型单元电路设计:(硕士学位论文).成都:电子科技大学,2005.
[20]D.Gilbert.Understanding D/A Accuracy Specs.Electronic Products,1981,24(3):61-63.
[21]M.J.M.Pelgrom,A.C.J.Duinmaijer,A.P.G.Welbers.Matching properties of MOS transistors.IEEE J.Solid-state Circuits,1998,24(10):1433-1439.
[22]Douglas Mercer.A 16-bit D/A Converter with increased SPURIOUS free Dynamic Range.IEEE Journal of solid-state circuits,1994,29(6):785-791.
[23]Marcel J.M.Pelgrom.A 10-bit 50-MHz CMOS D/A Converter with 75Ω Buffer.IEEE Journal of solid-state circuits,1990,25(6):732-741.
[24]Nasrollah Navid.A theory and an algorithm for analog Circuit Fault Diagnosis.IEEE TRANSATIONS ON CIRCUITS AND SYSTEMS,1979,26(7):440-457.
[25]Timothy N.Trick.Calculation of Parameter Values from Node Voltage Measurements.IEEE TRANSATIONS ON CIRCUITS AND SYSTEMS,1979,26(7):466-474.
[26]Chi-Hung Lin,Klaas Bult.A 10-b,500-MSample/s CMOS DAC in 0.6mm2.IEEE Journal of Solid-State Circuit,1998,33(12):451-455.
[27]A.Van den Bosch et al.Modeling and realization of high accuracy,high speed current-steering CMOS D/A converters.IEEE measurement,2000:123-128.
[28]Russ E.Radke,Aria Eshraghi,Terri S.Fiez.A 14-Bit Current-Mode ΣΔ DAC Based Upon Rotated Data Weighted Averaging.IEEE JOURNAL OF SOLID-STATE CIRCUITS,2000,35:320-326.
[29]Alex R.Bugeja,Bang-Sup song.A Self-Trimming 14-b 100-MS/s CMOS DAC.IEEE JOURNAL OF SOLID-STATE CIRCUITS,2000,35(12):512-516.
[30]Mikea P.Tiilikainen.A 14-bit 1.8-V 20-Mw 1-mm2 CMOS DAC.IEEE JOURNAL OF SOLID-STATE CIRCUITS,2001,36(7):154-159.
[31]Sungkyung Park,Gyudong film,Sin-Chong Park.A Digital-to-Analog Converter Based on Differential-Quad Switching.IEEE JOURNAL OF SOLID-ASTATE CIRCUIT,2002,37(10):651-657.
[32]Jiangdong Jiang,Edward K.F.Lee.A Low-Power Segmentde Nonlinear DAC-Based Direct Digital Frequency Synthesizer.IEEE JOURNAL OF SOLID-STATE CIRCUITS,2002,37(10):235-238.
[33]邱关源.电路.第四版.北京:高等教育出版社,2003.
[34]Alan Hastings.模拟电路版图的艺术.第二版.张为等译.北京:电子工业出版社,2007.
[35]阎石.数字电子电路.北京:中央广播电视大学出版社,1993.
[36]康光华.电子技术基础(数字部分 第三版).北京:高等教育出版社,1988.
[37]李士雄,丁康源.数字集成电子技术教程.北京:高等教育出版社,1993.
[38]Y.P.Tsividis,R.W.Ulmer.A CMOS Voltage Reference.IEEE J.of Solid-Skate Circuits,1978,13:324-330.
[39]G.C.M.Meijer,P.C.Schmall,K.van Zanlinge.A New Curvature-corrected Bandgap Reference.IEEE J.of Solid-State Circuit,1982,17:352-355.
[40]何捷,朱臻,王涛.一种具有温度补偿、高电源抑制比的带隙基准源.复旦大学学报(自然科学版),2001,40(1):70-86.
[41]朱樟明,杨银堂,朱磊等.一种高性能CMOS带隙电压基准源设计.半导体学报,2004,25(5):542-545.
[42]朱樟明,杨银堂,尹韬.一种新型低压高精度CMOS电流源.两安电子科技大学学报(自然科学版),32(2):174-178.
[43]王晗,叶青.0.18 μm数字CMOS工艺下的高增益运算放大器设计.半导体学报,2006,27:318-321.
[44]付永朝,杨银堂,朱樟明等.一种基于前馈补偿技术的高性能CMOS运算放大器.电子器件,2004,27(1):27-30.
[45]柳逊,闫娜,吴晓铁等.一种高性能运算放大器的设计.微电子学,2005,22(6):28-30.
[46]张奉江,吴贵能,张红等.一种高性能共模反馈CMOS运算放大器.微电子学,2007,37(3):407-410.
[47]李铁,郭立,白雪飞.低功耗满幅跨导CMOS运算放火器设计.微电子学与计算机,2007,24(8):102-105.
[48]高涛.高增益CMOS全差分运放的研究与设计:(硕士学位论文).成都:电子科技大学,2005.
[49]J.Jacob Wikner,Nianxiong Tan.Modeling of CMOS Digital-to-Analog Converters for Telecommunication.IEEE Transactions on Circutis and Systems Ⅱ,1999,46:123-126.
[50]Anne Van den Bosch.A 10-bit l-GSample/s Nyquist Current-steering CMOS D/A Converter.IEEE Journal of Solid-State Circuit,2001,36:223-225.
[51]Jose Bastos,Augusto M.Marques,Willy Sansen.A 12-Bit Intrinsic Accuracy High-Speed CMOS DAC.IEEE Journal of Solid-State Circuits,1998,33:265-269.
[52]H.Schouwenaars,D.Groeneveld,H.Termeer.A low-power stereo 16-bit CMOS D/A converter for digital audio.IEEE J.Solid-State Circuits,1988,23:614-619.
[53]贾新章.微电子技术概论.北京:国防工业出版社,1995.
[54]渡边诚,钱田邦博.超大规模集成电路设计-电路与版图设计.北京:科学出版社,1988.
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