基于FPGA的数字锁相放大器研究
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摘要
锁相放大器是用于检测微弱信号的装置,具有检测能力强、通用性强、可靠性高等优点,因而在微弱信号检测中有着广泛应用。随着数字处理技术的发展,出现了数字锁相放大器,数字锁相放大器克服了模拟锁相放大器的温漂和其他非理想的低频特性,极大改善了锁相放大器的性能,使锁相放大器的研究发展和应用得到了很大提高。
本文在调研了市场常见的数字锁相放大器的基础上,结合实验室已有的研究成果,针对其中的不足之处进行改进,完成了一款基于FPGA的数字锁相放大器,并对其进行了全面而深入的分析和测试。
等效输入噪声是数字锁相放大器的重要指标,本文从前置放大器、AD模块、数字处理模块和DA模块等四个部分分别进行了分析,分析了各个模块对系统噪声影响,不但实测得到了噪声性能,而且通过分析明确了噪声的来源,这对以后的噪声性能改进有重要意义。并测得在在前置放大器增益为34 dB的情况下系统的零输入等效噪声可达到3.5 nV/√Hz,但是其噪声量是随着输入信号的频率和幅度的增大而增大,通过分析和实测验证这是由于AD采样时钟抖动引起的,同样DA产生载波的过程中也会有这种现象,这种现象可以通过采用高质量的专用时钟系统进行消除。
同时对系统的整体性能进行了全面的测试,包括前置放大器的特性、等效输入噪声、线性度、动态范围和温度特性。其中等效输入噪声在长时间内具有稳定性,系统具有良好的解调线性度,在较小解调带宽的下系统具有100 dB以上的动态范围。通过各模块的温度特性的测试,发现系统中前置放大器的增益温漂最大,是系统温漂的主要来源,并测试得到在不含前置放大器和包含前置放大器两种情况下系统的整体温漂,分别为120 ppm/℃和-880 ppm/℃。并将测试结果与商用锁相放大器SR844进行了对比,发现其不但在关键性能上优于或相当于SR844,而且在功耗、重量和体积方面有很大优势。
The Lock-In Amplifier (LIA), with advantages of high detection capability, versatility and high reliability, and thus it has wide applications in weak signal detection, is equipment used to detect weak signals. With the development of digital technology, digital LIAs have been proposed to improve the performance, with benefits of lower drift and other non-ideal characteristics than analogy LIAs. So the digital LIAs have been developed greatly in many applications.
On the basis of the survey of the existing LIAs in the market and in the laboratory, a digital LIA based on Field Programmable Gate Array (FPGA) has been developed. The improved design has been done according to the inadequacies of before design. The in-depth study, including noise and temperature characteristics, has also been researched as a good reference for further improvement design.
The equivalent input noise is an important indicator of the LIA, and thus it is has been deeply analyzed from the four parts, including the preamplifier module, the AD module, the digital processing module and the DA module. Not only the amounts of noise for each part and the system have been tested, and the sources of noise for each part have also been analyzed, which is very important for further performance improvements. The tested system equivalent input noise can be as small as 3.5 nV/Hz when the gain of the preamplifier is 34 dB. Unfortunately the amount of the noise increases as the amplitude or the frequency of the input signal increase. This is due to the clock jitter of AD sampling, which is confirmed by the analysis and the measured results. The phenomenon appears at wave generation from DA in the same way. However, it can be eliminated by using high-quality dedicated clock system.
At the same time the comprehensive indicators of the overall system have been tested, including the characteristics of the preamplifier, the system equivalent input noise, linearity, dynamic range and the temperature characteristics. The results show that the system equivalent input noise is stable on the time, the system has good demodulation linearity, and the dynamic range can be larger than 100 dB with small demodulation bandwidth. According to the tested results of the temperature characteristics of each module, it shows that the largest temperature drift is from the preamplifier, which is the main contribution of the system temperature drift. It has been tested that the system temperature drift in two cases with and without preamplifier can be-880 ppm/℃and 120 ppm/℃respectively. Meanwhile, the results have also been compared with SR844, a common digital LIA in the market, and the digital LIA based on FPGA is better than or equivalent to SR844 in many key features and it has advantages in power consumption, weight and volume.
本文在调研了市场常见的数字锁相放大器的基础上,结合实验室已有的研究成果,针对其中的不足之处进行改进,完成了一款基于FPGA的数字锁相放大器,并对其进行了全面而深入的分析和测试。
等效输入噪声是数字锁相放大器的重要指标,本文从前置放大器、AD模块、数字处理模块和DA模块等四个部分分别进行了分析,分析了各个模块对系统噪声影响,不但实测得到了噪声性能,而且通过分析明确了噪声的来源,这对以后的噪声性能改进有重要意义。并测得在在前置放大器增益为34 dB的情况下系统的零输入等效噪声可达到3.5 nV/√Hz,但是其噪声量是随着输入信号的频率和幅度的增大而增大,通过分析和实测验证这是由于AD采样时钟抖动引起的,同样DA产生载波的过程中也会有这种现象,这种现象可以通过采用高质量的专用时钟系统进行消除。
同时对系统的整体性能进行了全面的测试,包括前置放大器的特性、等效输入噪声、线性度、动态范围和温度特性。其中等效输入噪声在长时间内具有稳定性,系统具有良好的解调线性度,在较小解调带宽的下系统具有100 dB以上的动态范围。通过各模块的温度特性的测试,发现系统中前置放大器的增益温漂最大,是系统温漂的主要来源,并测试得到在不含前置放大器和包含前置放大器两种情况下系统的整体温漂,分别为120 ppm/℃和-880 ppm/℃。并将测试结果与商用锁相放大器SR844进行了对比,发现其不但在关键性能上优于或相当于SR844,而且在功耗、重量和体积方面有很大优势。
The Lock-In Amplifier (LIA), with advantages of high detection capability, versatility and high reliability, and thus it has wide applications in weak signal detection, is equipment used to detect weak signals. With the development of digital technology, digital LIAs have been proposed to improve the performance, with benefits of lower drift and other non-ideal characteristics than analogy LIAs. So the digital LIAs have been developed greatly in many applications.
On the basis of the survey of the existing LIAs in the market and in the laboratory, a digital LIA based on Field Programmable Gate Array (FPGA) has been developed. The improved design has been done according to the inadequacies of before design. The in-depth study, including noise and temperature characteristics, has also been researched as a good reference for further improvement design.
The equivalent input noise is an important indicator of the LIA, and thus it is has been deeply analyzed from the four parts, including the preamplifier module, the AD module, the digital processing module and the DA module. Not only the amounts of noise for each part and the system have been tested, and the sources of noise for each part have also been analyzed, which is very important for further performance improvements. The tested system equivalent input noise can be as small as 3.5 nV/Hz when the gain of the preamplifier is 34 dB. Unfortunately the amount of the noise increases as the amplitude or the frequency of the input signal increase. This is due to the clock jitter of AD sampling, which is confirmed by the analysis and the measured results. The phenomenon appears at wave generation from DA in the same way. However, it can be eliminated by using high-quality dedicated clock system.
At the same time the comprehensive indicators of the overall system have been tested, including the characteristics of the preamplifier, the system equivalent input noise, linearity, dynamic range and the temperature characteristics. The results show that the system equivalent input noise is stable on the time, the system has good demodulation linearity, and the dynamic range can be larger than 100 dB with small demodulation bandwidth. According to the tested results of the temperature characteristics of each module, it shows that the largest temperature drift is from the preamplifier, which is the main contribution of the system temperature drift. It has been tested that the system temperature drift in two cases with and without preamplifier can be-880 ppm/℃and 120 ppm/℃respectively. Meanwhile, the results have also been compared with SR844, a common digital LIA in the market, and the digital LIA based on FPGA is better than or equivalent to SR844 in many key features and it has advantages in power consumption, weight and volume.
引文
[1]高晋占.微弱信号检测.北京：清华大学出版社,2004：154-196.
[2]朱瑞.锁相放大器及其应用.国外电子元器件,2005,(1)：75-76.
[3]凌海.锁相电路在分析仪器中的应用.分析仪器,2000,(2)：43-46.
[4]Robert McDonough. Detection of signals in noise.California, USA:AT&T Bell Laboratories and Academic Press,1995.
[5]Zhihua Feng, Rilong Liu and Dengfeng Yang. Influence analysis of sensor's nonlinearity on output of lock-in amplifier. Instrument and Measurement Technology Conference, Ottawa, Canada, May,2005.
[6]Maziar Tavakoli and Rahal Sarpeshkar. An offset-canceling low-noise lock-in architecture for capacitive sensing. IEEE Journal of Solid-State Circuits,2003,38 (2):244-253.
[7]杨贵东,马慧莲,张旭琳等.一种应用于谐振式微型光学陀螺的高频数字锁相放大器设计.传感技术学报,2005,18(4)：977-981.
[8]Masakazu Nakanishi and Yasuhiko Sakamoto. Analysis of first-order feedback loop with lock-in amplifier. IEEE Transactions on Circuits and System:Analog and Digital Signal Processing,1996,43(5):570-573.
[9]Mandelis Andreas. Signal-to-noise ratio in lock-in amplifier synchronous detection:A generalized communications systems approach with applications to frequency, time, and hybrid (rate window) photothermal measurements. Review of Scientific Instruments,1994,65 (11):10.1063/1.1144568.
[10]Meade M. L. Advances in lock-in amplifiers. Journal Physics E:Science Instrument,1982:551-557.
[11]Maximilliano Sonnaillon and Fabian Bonetto. A low-cost, high-performance, digital signal processor-based lock-in amplifier capable of measuring multiple frequency sweeps simultaneously. Review of Scientific Instruments,2005,76 (2): 10.1063/1.1854196.
[12]Barone Fabrizio and Calloni Difiore. High-performance modular digital lock-in a(?). Review of Scientific Instruments,1995,66 (6):10.1063/1.1145423.
[13]Model SR844 RF lock-in amplifier, Stanford Research System, www.thinksrs. com/downloads/PDFs/Catalog/SR844c.pdf. Oct.2003.
[14]eLockIn 204 4-phase DSP lock-in amplifier, Anfatec Instruments, http://www. anfatec.de/anfatec/elockin204.pdf, Nov.2010.
[15]HF2LI lock-in amplifier datasheet, Zurich Instruments, http://www.zhinst.com /products/hf21i. Feb.2011.
[16]周晓奇.电容式微机械加速度计处理电路研究.浙江大学硕士学位论文,2008.
[17]鲍慧强.谐振式光学陀螺频率锁定技术与实现.浙江大学硕士学位论文,2010.
[18]Gimeno Jesus and Lamela Horacio. CORDIC algorithms for SVM FPGA implem-enttation. Conference'on Independent Component Analyses, Wavelets, Neural Networks, Biosystems, and Nanoengineering VIII, Orlando, USA, April,2010.
[19]Ray Andraka. A survey of CORDIC algorithms for FPGA based computers. The Sixth International Symposium on Field Programmable Gate Arrays, New York, USA,1998.
[20]于慧敏,凌明芳,胡中功.信号与系统.北京：化学工业出版社,2003.
[21]程佩青.数字信号处理教程.北京：清华大学出版社,2003.
[22]王军,戴逸松.低噪声前放中集成运放电路的En-In噪声性能分析.仪器仪表学报,1998,19(4)：352-357.
[23]王军.低噪声放大器模块化分析与设计的等效噪声模块法.电子学报,2000,28(3)：81-83.
[24](?)峥嵘.运算放大器电路的噪声分析和设计.微电子学,2006,36(2)：148-153.
[25]王慧泉,郁发新,金仲和等.传感器电流中乘法器噪声模型分析.电路与系统学报,2006,11(5)：66-69.
[26]Robert Walden. Analog-to-digital converter survey and analysis. IEEE journal on selected areas in communications,1999,17 (4):539-549.
[27]采样系统以及时钟相位噪声和抖动的影响,ADI AN-756应用笔记www. analog.com.
[28]孔径不确定度与ADC系统性能,ADIAN-501应用笔记www.analog.com.
[29]张骏凌,张玉兴.直接数字频率合成器中的相位噪声分析.电子科技大学学报,1999,28(1)：990106.
[30]方穗明,王占仓.码密度法测量模数转换器的静态参数.北京工业大学学报,2006,32(11)：864-866.
[2]朱瑞.锁相放大器及其应用.国外电子元器件,2005,(1)：75-76.
[3]凌海.锁相电路在分析仪器中的应用.分析仪器,2000,(2)：43-46.
[4]Robert McDonough. Detection of signals in noise.California, USA:AT&T Bell Laboratories and Academic Press,1995.
[5]Zhihua Feng, Rilong Liu and Dengfeng Yang. Influence analysis of sensor's nonlinearity on output of lock-in amplifier. Instrument and Measurement Technology Conference, Ottawa, Canada, May,2005.
[6]Maziar Tavakoli and Rahal Sarpeshkar. An offset-canceling low-noise lock-in architecture for capacitive sensing. IEEE Journal of Solid-State Circuits,2003,38 (2):244-253.
[7]杨贵东,马慧莲,张旭琳等.一种应用于谐振式微型光学陀螺的高频数字锁相放大器设计.传感技术学报,2005,18(4)：977-981.
[8]Masakazu Nakanishi and Yasuhiko Sakamoto. Analysis of first-order feedback loop with lock-in amplifier. IEEE Transactions on Circuits and System:Analog and Digital Signal Processing,1996,43(5):570-573.
[9]Mandelis Andreas. Signal-to-noise ratio in lock-in amplifier synchronous detection:A generalized communications systems approach with applications to frequency, time, and hybrid (rate window) photothermal measurements. Review of Scientific Instruments,1994,65 (11):10.1063/1.1144568.
[10]Meade M. L. Advances in lock-in amplifiers. Journal Physics E:Science Instrument,1982:551-557.
[11]Maximilliano Sonnaillon and Fabian Bonetto. A low-cost, high-performance, digital signal processor-based lock-in amplifier capable of measuring multiple frequency sweeps simultaneously. Review of Scientific Instruments,2005,76 (2): 10.1063/1.1854196.
[12]Barone Fabrizio and Calloni Difiore. High-performance modular digital lock-in a(?). Review of Scientific Instruments,1995,66 (6):10.1063/1.1145423.
[13]Model SR844 RF lock-in amplifier, Stanford Research System, www.thinksrs. com/downloads/PDFs/Catalog/SR844c.pdf. Oct.2003.
[14]eLockIn 204 4-phase DSP lock-in amplifier, Anfatec Instruments, http://www. anfatec.de/anfatec/elockin204.pdf, Nov.2010.
[15]HF2LI lock-in amplifier datasheet, Zurich Instruments, http://www.zhinst.com /products/hf21i. Feb.2011.
[16]周晓奇.电容式微机械加速度计处理电路研究.浙江大学硕士学位论文,2008.
[17]鲍慧强.谐振式光学陀螺频率锁定技术与实现.浙江大学硕士学位论文,2010.
[18]Gimeno Jesus and Lamela Horacio. CORDIC algorithms for SVM FPGA implem-enttation. Conference'on Independent Component Analyses, Wavelets, Neural Networks, Biosystems, and Nanoengineering VIII, Orlando, USA, April,2010.
[19]Ray Andraka. A survey of CORDIC algorithms for FPGA based computers. The Sixth International Symposium on Field Programmable Gate Arrays, New York, USA,1998.
[20]于慧敏,凌明芳,胡中功.信号与系统.北京：化学工业出版社,2003.
[21]程佩青.数字信号处理教程.北京：清华大学出版社,2003.
[22]王军,戴逸松.低噪声前放中集成运放电路的En-In噪声性能分析.仪器仪表学报,1998,19(4)：352-357.
[23]王军.低噪声放大器模块化分析与设计的等效噪声模块法.电子学报,2000,28(3)：81-83.
[24](?)峥嵘.运算放大器电路的噪声分析和设计.微电子学,2006,36(2)：148-153.
[25]王慧泉,郁发新,金仲和等.传感器电流中乘法器噪声模型分析.电路与系统学报,2006,11(5)：66-69.
[26]Robert Walden. Analog-to-digital converter survey and analysis. IEEE journal on selected areas in communications,1999,17 (4):539-549.
[27]采样系统以及时钟相位噪声和抖动的影响,ADI AN-756应用笔记www. analog.com.
[28]孔径不确定度与ADC系统性能,ADIAN-501应用笔记www.analog.com.
[29]张骏凌,张玉兴.直接数字频率合成器中的相位噪声分析.电子科技大学学报,1999,28(1)：990106.
[30]方穗明,王占仓.码密度法测量模数转换器的静态参数.北京工业大学学报,2006,32(11)：864-866.