基于CPCI总线的数字I/O设计
摘要
随着电子设备功能的不断增强,复杂度也在不断提高,对这些系统的测试要求也越来越高,因而促进了自动测试系统的发展。而数字I/O模块作为自动测试系统重要的测试模块,它既可以作为信号源激励被测系统,也可以检测被测系统的输出,其各方面的功能得到了很大的提高,并在很多领域得到了非常广泛的应用。
本文首先介绍了课题的背景和发展情况,提出了课题的任务和指标。并结合课题的任务提出采用可编程逻辑器件、CPCI接口芯片、存储器和驱动芯片的硬件总体方案,随后具体论述了各部分电路的设计方案和器件特性。接着详细描述了可编程逻辑器件中CPCI总线接口逻辑设计、图形数据发送逻辑设计、RS422电平数据采集逻辑设计、UART接收逻辑设计,以及LVTTL电平计数器逻辑设计等。此外,对模块的硬件和功能调试做了简单的论述,并总结了课题调试过程中所遇到的问题和解决方法。
经过测试表明,本课题所设计的数字I/O模块具有LVTTL电平和RS422电平离散数据的发送和接收功能、LVTTL电平和RS422电平的图形数据输出功能以及RS422电平数据采集功能,并实现了LVTTL电平的计数以及RS422电平的UART接收功能。由它组建的测试系统具有测试精度高,工作稳定等优点,能够满足各种测试系统的要求,可广泛应用于产品开发、故障诊断和逻辑测试等场合。
The electronic equipment is more complex as the fuction growing,so the measure of these system is more difficulty.Because of this,the automatic measure system is developing quickly.As the import part of the measure system, the digital I/O module can drive DUT(the system under test) as a signal generator,and detect the output of the DUT,so the function of digital I/O module has a great development and been very widely used.
First,the paper describles the background and development of the subject,then present the task and target of the subject. According to the target the scheme of CPCI interface chip,programmable logic device, memory chip and driver chip hardware frame structure has been adopted to achieve the design of digital I/O module. The paper discusses the design of each part of the circuit and the chip characteristics. Then the paper has a detailed describition of the CPCI bus logic design,graphic data transmission logic design, RS422-level timing analysis logic design,UART logic design and LVTTL-level counter logic design.The paper alse has a sample explain the debugging of the digital I/O, and summarize the problem in the design and the means how to solve it.
The digital I/O module can send and receive the LVTTL-level and RS422-level discrete data,and output LVTTL-level and RS422-level graphic data.It can collect the RS422-level signal and count the LVTTL-level signal,and it alse has the function of UART interface. The digital I/O has the advantage of high precison and stable,it meet the requirement of many test system and can be used in product development, fault diagnosis and logic test,etc.
本文首先介绍了课题的背景和发展情况,提出了课题的任务和指标。并结合课题的任务提出采用可编程逻辑器件、CPCI接口芯片、存储器和驱动芯片的硬件总体方案,随后具体论述了各部分电路的设计方案和器件特性。接着详细描述了可编程逻辑器件中CPCI总线接口逻辑设计、图形数据发送逻辑设计、RS422电平数据采集逻辑设计、UART接收逻辑设计,以及LVTTL电平计数器逻辑设计等。此外,对模块的硬件和功能调试做了简单的论述,并总结了课题调试过程中所遇到的问题和解决方法。
经过测试表明,本课题所设计的数字I/O模块具有LVTTL电平和RS422电平离散数据的发送和接收功能、LVTTL电平和RS422电平的图形数据输出功能以及RS422电平数据采集功能,并实现了LVTTL电平的计数以及RS422电平的UART接收功能。由它组建的测试系统具有测试精度高,工作稳定等优点,能够满足各种测试系统的要求,可广泛应用于产品开发、故障诊断和逻辑测试等场合。
The electronic equipment is more complex as the fuction growing,so the measure of these system is more difficulty.Because of this,the automatic measure system is developing quickly.As the import part of the measure system, the digital I/O module can drive DUT(the system under test) as a signal generator,and detect the output of the DUT,so the function of digital I/O module has a great development and been very widely used.
First,the paper describles the background and development of the subject,then present the task and target of the subject. According to the target the scheme of CPCI interface chip,programmable logic device, memory chip and driver chip hardware frame structure has been adopted to achieve the design of digital I/O module. The paper discusses the design of each part of the circuit and the chip characteristics. Then the paper has a detailed describition of the CPCI bus logic design,graphic data transmission logic design, RS422-level timing analysis logic design,UART logic design and LVTTL-level counter logic design.The paper alse has a sample explain the debugging of the digital I/O, and summarize the problem in the design and the means how to solve it.
The digital I/O module can send and receive the LVTTL-level and RS422-level discrete data,and output LVTTL-level and RS422-level graphic data.It can collect the RS422-level signal and count the LVTTL-level signal,and it alse has the function of UART interface. The digital I/O has the advantage of high precison and stable,it meet the requirement of many test system and can be used in product development, fault diagnosis and logic test,etc.
引文
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[2]王森.PXI高性能数字I/O研制:[硕士学位论文].哈尔滨:哈尔滨工业大学,2008,4-15
[3]郭凡.PXI总线接口的设计与应用:[硕士学位论文].武汉:华中科技大学,2009,14-17
[4]王诚,吴继华,范丽珍等.Altera FPGA/CPLD设计[M].北京:人民邮电出版社,2005,7-14
[5] Altera Corporation ,Cyclone II Device Handbook[DB/OL],2005,17-80
[6] Altera Corporation ,MAX II Device Handbook [DB/OL],2005,3-49
[7]陈长龄,田书林,师奕兵等.自动测试及接口技术[M].北京:机械工业出版社,2005,1-19
[8]韩世川.基于CPCI总线的数字图像I/O设计:[硕士学位论文].成都电子科技大学,2010,8-10
[9]吴国庆,王格芳,郭阳宽.现代测试技术及应用[M].北京:电子工业出版社,2006年,88-93
[10]李贵山,戚德虎.PCI局部总线开发者指南[M].西安:西安电子科技大学出版社,2001
[11]王建永,李德华.PCI9030及其应用[J].计算机与数字工程,2002(02),22-27
[12] PLX Technology,Inc.PCI9030 Data Book,V2.1,2000,1-350
[13] Tom Shanley·刘军等译.PCI系统结构(第四版) [M].北京:电子工业出版社,2000
[14] Ramtron International Corporation.FM25L256 Datasheet[DB/OL],2005,1-14
[15] TI Corporation,Inc.SN74CBTD3384 Data Book[DB/OL],2000,1-16
[16] MAXIM Corporation,Inc.MAX3490 Datasheet[DB/OL],1994,1-17
[17]夏雨闻.Verilog数字系统设计[M].北京:北京航空航天大学出版社,2003,114-122
[18]段素容,庄圣贤.一种内置FIFO全双工UART的设计与实现[J].通信技术,2010(02):46-47
[19]王钿,卓兴旺.基于Verilog HDL的数字系统应用设计[M].北京:国防工业大学出版社,2007,87-89
[20]古天祥,王厚军,习友宝.电子测量原理[M].北京:机械工业出版社,2004年,155-171
[21]宋宇峰. LabWindows/CVI逐步深入与开发实例[M].北京:机械工业出版社, 2003:1-10
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