MVB1类设备控制器的FPGA设计
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摘要
基于分布式控制系统的列车通信网络(TCN)包括连接列车内不同车辆的铰链式列车总线(WTB)和连接车辆内固定设备的多功能车辆总线(MVB)。在MVB产品中，实现数据链路层协议的核心芯片MVB设备控制器是MVB技术的关键，其功能是实现MVB与其物理设备之间的通信。目前MVB控制器的技术被国外的几个公司垄断，致使在国内购买该芯片价格昂贵，并且我国对引进技术的理解消化和二次开发都做的不够，这些因素严重阻碍了MVB在国内机车上的推广使用，同时也不利于研制具有自主知识产权的列车通信网络产品和日后制定中国自己的列车通信网络标准。
正是基于这些原因，本文对TCN中的MVB技术进行了仔细研究，并在深入了解MVB的通信机制的基础上，提出了采用FPGA替代MVB控制器专用芯片的解决方法。根据TCN协议，连接在MVB上的设备可以分为5类，其中1类设备可以在不需要CPU的基础上实现自动通信，最为常用。本设计的目的就是采用FPGA替代MVB1类设备控制器。
本文采用自顶向下的模块化设计方法，根据MVB1类设备控制器要实现的功能，将设计划分为3个模块：发送模块、接收模块和MVB1类模式控制模块。其中发送模块又划分为位控制单元、CRC生成单元、FIFO单元和曼彻斯特编码单元等。接收模块又划分为帧起始检测单元、时钟恢复单元、帧分界符检测单元、数据译码单元、CRC校验单元、译码控制单元和长度错误检测单元等。MVB1类模式控制模块又划分为报文错误处理单元、主帧寄存器单元、TM控制单元和主控单元等。上述各模块的RTL级设计都是采用硬件描述语言Verilog实现的。
在完成RTL级设计的基础上，进一步构建了整个系统的功能仿真平台，在该平台上验证了设计的正确性。针对Xilinx公司的XC2S200芯片，利用ISE集成工具对本设计进行了综合及时序仿真，验证了其收／发帧及报文分析等功能，得到了符合IEC61375-1协议的帧波形。
Train Communication Network (TCN) which bases on distributed control system is divided into Wire Train Bus (WTB) which is used for interconnecting vehicles in Open Trains and Mutifunction Vehicle Bus (MVB) which is used for connecting fixed devices in a vehicle. Referred to the products of MVB, the MVB controller which realizes the protocol of link level is the key technology of MVB. Its function is to realize the communication between MVB and the linked physical device. The MVB related technologies and products are monopolized by some foreign companies, which baffles the applications of MVB in our country. This situation doesn't profit the research of our own products and the establishment of our own standard.
For all of the reasons above, MVB is researched and on the base of understanding the MVB communication mechanism, a method with FPGA to replace the MVB controller ASIC is proposed in this paper. Devices attached to the MVB are divided into five classes according to the TCN protocol. Class 1 devices which are most widely used in TCN can realize automatic communication without the help of CPU. The purpose of this paper is to design Class 1 MVB Controller with FPGA.
Based on the function of the class 1 MVB controller to realize, a top-down module design method is adopted and the design is divided into three modules: encoder, decoder and class 1 device controller. To realize the functions of encoder, this paper divides it into following basic units: bit control, CRC generator, FIFO and Manchester coding etc. The decoder is also divided into start detecting, clock recover, frame delimiter detecting, data decode, CRC checkout, decoding control and length error detecting units etc. And class 1 device controller module is divided into error handle, master frame register, MCU and traffic memory controller units etc. The RTL design of all the modules above is completed with Verilog HDL.
After the RTL design, the function simulation platform for the whole system is constructed and the design is validated on it. Then, the design is synthesized and timing simulated with ISE for XC2S200 FPGA. The functions of the MVB controller such as encoder, decoder and class 1 device controller are validated and frame waveforms in complete conformance with IEC61375-1 protocol are achieved.
正是基于这些原因，本文对TCN中的MVB技术进行了仔细研究，并在深入了解MVB的通信机制的基础上，提出了采用FPGA替代MVB控制器专用芯片的解决方法。根据TCN协议，连接在MVB上的设备可以分为5类，其中1类设备可以在不需要CPU的基础上实现自动通信，最为常用。本设计的目的就是采用FPGA替代MVB1类设备控制器。
本文采用自顶向下的模块化设计方法，根据MVB1类设备控制器要实现的功能，将设计划分为3个模块：发送模块、接收模块和MVB1类模式控制模块。其中发送模块又划分为位控制单元、CRC生成单元、FIFO单元和曼彻斯特编码单元等。接收模块又划分为帧起始检测单元、时钟恢复单元、帧分界符检测单元、数据译码单元、CRC校验单元、译码控制单元和长度错误检测单元等。MVB1类模式控制模块又划分为报文错误处理单元、主帧寄存器单元、TM控制单元和主控单元等。上述各模块的RTL级设计都是采用硬件描述语言Verilog实现的。
在完成RTL级设计的基础上，进一步构建了整个系统的功能仿真平台，在该平台上验证了设计的正确性。针对Xilinx公司的XC2S200芯片，利用ISE集成工具对本设计进行了综合及时序仿真，验证了其收／发帧及报文分析等功能，得到了符合IEC61375-1协议的帧波形。
Train Communication Network (TCN) which bases on distributed control system is divided into Wire Train Bus (WTB) which is used for interconnecting vehicles in Open Trains and Mutifunction Vehicle Bus (MVB) which is used for connecting fixed devices in a vehicle. Referred to the products of MVB, the MVB controller which realizes the protocol of link level is the key technology of MVB. Its function is to realize the communication between MVB and the linked physical device. The MVB related technologies and products are monopolized by some foreign companies, which baffles the applications of MVB in our country. This situation doesn't profit the research of our own products and the establishment of our own standard.
For all of the reasons above, MVB is researched and on the base of understanding the MVB communication mechanism, a method with FPGA to replace the MVB controller ASIC is proposed in this paper. Devices attached to the MVB are divided into five classes according to the TCN protocol. Class 1 devices which are most widely used in TCN can realize automatic communication without the help of CPU. The purpose of this paper is to design Class 1 MVB Controller with FPGA.
Based on the function of the class 1 MVB controller to realize, a top-down module design method is adopted and the design is divided into three modules: encoder, decoder and class 1 device controller. To realize the functions of encoder, this paper divides it into following basic units: bit control, CRC generator, FIFO and Manchester coding etc. The decoder is also divided into start detecting, clock recover, frame delimiter detecting, data decode, CRC checkout, decoding control and length error detecting units etc. And class 1 device controller module is divided into error handle, master frame register, MCU and traffic memory controller units etc. The RTL design of all the modules above is completed with Verilog HDL.
After the RTL design, the function simulation platform for the whole system is constructed and the design is validated on it. Then, the design is synthesized and timing simulated with ISE for XC2S200 FPGA. The functions of the MVB controller such as encoder, decoder and class 1 device controller are validated and frame waveforms in complete conformance with IEC61375-1 protocol are achieved.
引文
[1] 路向阳．列车通信网络的发展与应用综述．机车电传动，2002，(1)：7-11．
[2] 王俊景．列车通信网络简介．城市轨道交通研究，2005，(6)：93-96．
[3] 左健存，蒋晓黎．高速列车通信网的技术特点及其在机车车辆上的应用．交通与计算机，1999，17(4)：40-43．
[4] 蔡颖，诸昌钤．MVB网络接口单元的FPGA实现．铁道机车车辆，2005，25(3)：27-28．
[5] 蔡颖．多功能车厢总线控制器(MVBC)的研究与设计：(硕士学位论文)．成都：西南交通大学，2005。
[6] 张元林，列车控制网络技术的现状与发展趋势．电力机车与城轨车辆，2006，29(4)：1-4．
[7] 刘文清，王永翔，王立德．基于SOPC的列车通信网卡的设计．电子产品世界，2006，11(6)：159-161．
[8] 李国平．列车通信网络WTB／MVB与Lon Works的技术比较与应用．铁道车辆，2004，42(1)：27-30．
[9] 常振臣，牛得田，王立德等．列车通信网络研究现状及展望．电力机车与城轨车辆，2005，28(3)：5-7．
[10] 奚国华，路向阳，夏寅．我国列车通信网络的实践与开发探讨．机车电传动，2000，(1)：2-5．
[11] 龚志鹏．基于MVB的新一代机车逻辑控制单元的研究：(硕士学位论文)．长沙：中南大学，2005．
[12] 谢步明，赵明元．列车通信网结构及其协议的研究．机车电传动，2000，(5)：3-5．
[13] Zur Bonsen G A. The Multifunction Vehicle Bus. Proceedings of the 1995 IEEE International Workshop on Factory Communication Systems, WFCS' 95, Leysin, Switz, 1995: 27-34.
[14] 李常贤，谢步明．TCN通信技术的自主研发．机车电传动，2006，(2)：14-17．
[15] IEC. IEC61375-1: Electric Railway Equipment-Train Bus Part Ⅰ: Train Communication Network. IEC, 1999.
[16] Moreno J C, Laloya E J, Navarro J. Line redundancy in MVB-TCN devices: a control unit design. IEEE Mediterranean Electrotechnical Conference(MELECON 2006), Spain, 2006: 789-794.
[17] Kirrmann H, Zuber P A. The IEC/IEEE Train Communication Network. IEEE Micro, 2001, 21(2): 81-92.
[18] Chavarria A. Slave node architecture for Train Communications Networks. 26th Annual Conference of the IEEE Electronics Society IECON 2000, Nagoya, 2000: 2431-2464.
[19] Jimenez J, Martin J. Comparison of two designs for the Multifunction Vehicle Bus. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2006, 25(5): 797-805.
[20] 王锋．基于FPGA的MVB1类设备网卡的设计．机车电传动，2004，(6)：21-23．
[21] 谢维达，赵亚辉，徐晓松．现场总线与列车通信网络．工业控制计算机，2002，15(1)：7-12．
[22] 赵红卫，张闯，郑雪洋等．现场总线技术在城市轻轨和地铁车辆控制系统中的应用．铁道机车车辆，2003，2(2)：8-10．
[23] 王伟．Verilog程序设计与应用．北京：人民邮电出版社，2005．
[24] 任艳颖，王彬．IC设计基础．西安：西安电子科技大学出版社，2003．
[25] 余佳．基于FPGA的设计与实现．计算机与数学工程，1995，23(1)：20-25．
[26] Xilinx Corporation. Spartan2 data sheet. Xilinx Corporation, 2005.
[27] Massoud P, Bahman S, Bryan T. Design and Analysis of Segmented Routing Channels for Row-based FPGA's. IEEE Transactions on Computer-aided Design of Integrated Circuit and System, 1994, 13(12): 1470-1479.
[28] Courtoy M. Emulation: Prototyping without the Hassles of FPGA-to-ASIC conversion. Wescon Conference Record, San Francisco, 1995: 283-286.
[29] 徐志军，徐光辉．CPLD／FPGA的开发与应用．北京：电子工业出版社，2002．
[30] 王诚，薛小刚，钟信潮．FPGA／CPLD设计工具Xilinx ISE使用祥解．北京：人民邮电出版社，2005．
[31] 李景华，林玉远．可编程逻辑器件与EDA技术．沈阳：东北大学出版社，2000．
[32] Adtranz. Multifunction Vehicle Bus Controller Data Sheet. Adtranz, 1997.
[2] 王俊景．列车通信网络简介．城市轨道交通研究，2005，(6)：93-96．
[3] 左健存，蒋晓黎．高速列车通信网的技术特点及其在机车车辆上的应用．交通与计算机，1999，17(4)：40-43．
[4] 蔡颖，诸昌钤．MVB网络接口单元的FPGA实现．铁道机车车辆，2005，25(3)：27-28．
[5] 蔡颖．多功能车厢总线控制器(MVBC)的研究与设计：(硕士学位论文)．成都：西南交通大学，2005。
[6] 张元林，列车控制网络技术的现状与发展趋势．电力机车与城轨车辆，2006，29(4)：1-4．
[7] 刘文清，王永翔，王立德．基于SOPC的列车通信网卡的设计．电子产品世界，2006，11(6)：159-161．
[8] 李国平．列车通信网络WTB／MVB与Lon Works的技术比较与应用．铁道车辆，2004，42(1)：27-30．
[9] 常振臣，牛得田，王立德等．列车通信网络研究现状及展望．电力机车与城轨车辆，2005，28(3)：5-7．
[10] 奚国华，路向阳，夏寅．我国列车通信网络的实践与开发探讨．机车电传动，2000，(1)：2-5．
[11] 龚志鹏．基于MVB的新一代机车逻辑控制单元的研究：(硕士学位论文)．长沙：中南大学，2005．
[12] 谢步明，赵明元．列车通信网结构及其协议的研究．机车电传动，2000，(5)：3-5．
[13] Zur Bonsen G A. The Multifunction Vehicle Bus. Proceedings of the 1995 IEEE International Workshop on Factory Communication Systems, WFCS' 95, Leysin, Switz, 1995: 27-34.
[14] 李常贤，谢步明．TCN通信技术的自主研发．机车电传动，2006，(2)：14-17．
[15] IEC. IEC61375-1: Electric Railway Equipment-Train Bus Part Ⅰ: Train Communication Network. IEC, 1999.
[16] Moreno J C, Laloya E J, Navarro J. Line redundancy in MVB-TCN devices: a control unit design. IEEE Mediterranean Electrotechnical Conference(MELECON 2006), Spain, 2006: 789-794.
[17] Kirrmann H, Zuber P A. The IEC/IEEE Train Communication Network. IEEE Micro, 2001, 21(2): 81-92.
[18] Chavarria A. Slave node architecture for Train Communications Networks. 26th Annual Conference of the IEEE Electronics Society IECON 2000, Nagoya, 2000: 2431-2464.
[19] Jimenez J, Martin J. Comparison of two designs for the Multifunction Vehicle Bus. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2006, 25(5): 797-805.
[20] 王锋．基于FPGA的MVB1类设备网卡的设计．机车电传动，2004，(6)：21-23．
[21] 谢维达，赵亚辉，徐晓松．现场总线与列车通信网络．工业控制计算机，2002，15(1)：7-12．
[22] 赵红卫，张闯，郑雪洋等．现场总线技术在城市轻轨和地铁车辆控制系统中的应用．铁道机车车辆，2003，2(2)：8-10．
[23] 王伟．Verilog程序设计与应用．北京：人民邮电出版社，2005．
[24] 任艳颖，王彬．IC设计基础．西安：西安电子科技大学出版社，2003．
[25] 余佳．基于FPGA的设计与实现．计算机与数学工程，1995，23(1)：20-25．
[26] Xilinx Corporation. Spartan2 data sheet. Xilinx Corporation, 2005.
[27] Massoud P, Bahman S, Bryan T. Design and Analysis of Segmented Routing Channels for Row-based FPGA's. IEEE Transactions on Computer-aided Design of Integrated Circuit and System, 1994, 13(12): 1470-1479.
[28] Courtoy M. Emulation: Prototyping without the Hassles of FPGA-to-ASIC conversion. Wescon Conference Record, San Francisco, 1995: 283-286.
[29] 徐志军，徐光辉．CPLD／FPGA的开发与应用．北京：电子工业出版社，2002．
[30] 王诚，薛小刚，钟信潮．FPGA／CPLD设计工具Xilinx ISE使用祥解．北京：人民邮电出版社，2005．
[31] 李景华，林玉远．可编程逻辑器件与EDA技术．沈阳：东北大学出版社，2000．
[32] Adtranz. Multifunction Vehicle Bus Controller Data Sheet. Adtranz, 1997.