基于CPLD的数字光纤通信系统的研究
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摘要
现代电子设计技术的核心是EDA(Electronic Design Automation)技术,EDA技术使得设计者仅利用软件方式便可完成对系统硬件功能的实现。复杂可编程逻辑器件CPLD(Complex Programmable Logic Device)是PLD(Programmable Logic Device)的一种,具有编程灵活、集成度高、设计开发周期短、适用范围广、开发工具先进、设计制造成本低、保密性强等特点,可实现较大规模的电路设计,因此被广泛应用于产品的原型设计和产品生产之中。本文以CPLD为载体设计了一个点对点的小型数字光纤通信系统。
光纤通信系统一般分为三部分,分别为光发送端,光纤,光接收端。在光发送端,来自于电端机的信号经过处理后对光源进行调制,把电信号转换成光信号,然后将已调的光信号耦合进光纤进行传输。光接收端将光纤传输来的光信号,经光检测器转换为电信号,然后再将这微弱的电信号经放大电路放大到足够的电平,送到接收端的电端机。
本文首先确定了数字光纤通信系统的总体设计方案,对基于CPLD的设计思想作了总体概述,并详细说明了CPLD的选型及配置下载,建立了片上系统的硬件开发平台。然后,论述了基于CPLD的数字光纤通信系统的软件设计方法和硬件设计方法。软件设计部分以“自顶向下”的设计思路按功能将整个系统划分为4个模块:PCM(Pulse CodeModulation)编译码、时分复用数字信号源、线路编译码及数字终端(位同步、帧同步、分接)模块,文中介绍了各模块的设计思想,并给出了各模块在MAX+PLUSⅡ中进行开发和仿真的结果。硬件设计部分包括音频接口电路、信号放大电路、PCM编译码电路、CPLD外围电路以及电源电路,详细介绍了各电路所采用的芯片,给出了电路原理图和实验波形。最后,本文给出了系统整体的软件设计原理图和硬件调试结果,对设计中出现的问题和硬件调试结果进行了分析,并讨论了CPLD实现过程中的问题及优化方案。
软件仿真和硬件调试结果表明:基于CPLD的数字光纤通信系统能够实现基本的通话,并且设计正确,性能良好。
The core of electronic technology is EDA (Electronic Design Automation) at present. The designers can accomplish the hardware function of system only by using software tool. CPLD (Complex Programmable Logic Device)is one kind of programmable logic devices(PLD), it is characterized by flexible programming, high integration, short cycle of design and development, wide application range, advanced development tool, low cost and high security, it also can realize a large-scale circuit design, therefore, it is widely used in prototype design and production. A point-to-point small digital optical fiber communication system based on CPLD is designed in this paper.
The optical fiber communication system can be divided into three parts, namely, optical transmitter, optical fiber, optical receiver. The processed signal from the electronic terminal is used to modulate the light on the optical transmitter, electronic signal can be converted into optical signal in the process. Then the modulated optical signal is coupled to the optical fiber. The optical signal from optical fiber is converted into electronic signal on the optical receiver, then this weak electronic signal is amplified to the enough level and sent to the electronic terminal.
At first, the paper confirms the overall design scheme of the ditigal optical fiber communication system. It introduces an overview of the design idea based on CPLD and illustrates the choice of CPLD and how to configure in detail, system on programmable chip is established.
Secondly, the software and the hardware design method of the ditigal optical fiber communication system based on CPLD is discussed. According to "top-down" structure in the software part, the whole system is divided into four independent modules: PCM encoder and decoder, time division multiplexing signal source, channel encoder and decoder and digital terminal (bit synchronization, frame synchronization, demultiplexing), the design idea of each module is described amply and the simulation results on MAX+PLUSII are gived. The hardware part includes audio interface circuit, signal amplification circuit, PCM encoding and decoding circuit, periphery circuit of CPLD and power circuit, the chips used in the circuits are introduced, then circuit schematics and experimental waveforms are displayed.
Finally, software design files and hardware debugging results of the whole system are presented. Some questions in the software design and hardware debugging are analyzed and the problems in realization of CPLD and the solutions are discussed.
The results of software simulation and hardware debugging show that the digital optical fiber communication system can realize basic communication, besides, it is designed correctly and the performance is excellent.
光纤通信系统一般分为三部分,分别为光发送端,光纤,光接收端。在光发送端,来自于电端机的信号经过处理后对光源进行调制,把电信号转换成光信号,然后将已调的光信号耦合进光纤进行传输。光接收端将光纤传输来的光信号,经光检测器转换为电信号,然后再将这微弱的电信号经放大电路放大到足够的电平,送到接收端的电端机。
本文首先确定了数字光纤通信系统的总体设计方案,对基于CPLD的设计思想作了总体概述,并详细说明了CPLD的选型及配置下载,建立了片上系统的硬件开发平台。然后,论述了基于CPLD的数字光纤通信系统的软件设计方法和硬件设计方法。软件设计部分以“自顶向下”的设计思路按功能将整个系统划分为4个模块:PCM(Pulse CodeModulation)编译码、时分复用数字信号源、线路编译码及数字终端(位同步、帧同步、分接)模块,文中介绍了各模块的设计思想,并给出了各模块在MAX+PLUSⅡ中进行开发和仿真的结果。硬件设计部分包括音频接口电路、信号放大电路、PCM编译码电路、CPLD外围电路以及电源电路,详细介绍了各电路所采用的芯片,给出了电路原理图和实验波形。最后,本文给出了系统整体的软件设计原理图和硬件调试结果,对设计中出现的问题和硬件调试结果进行了分析,并讨论了CPLD实现过程中的问题及优化方案。
软件仿真和硬件调试结果表明:基于CPLD的数字光纤通信系统能够实现基本的通话,并且设计正确,性能良好。
The core of electronic technology is EDA (Electronic Design Automation) at present. The designers can accomplish the hardware function of system only by using software tool. CPLD (Complex Programmable Logic Device)is one kind of programmable logic devices(PLD), it is characterized by flexible programming, high integration, short cycle of design and development, wide application range, advanced development tool, low cost and high security, it also can realize a large-scale circuit design, therefore, it is widely used in prototype design and production. A point-to-point small digital optical fiber communication system based on CPLD is designed in this paper.
The optical fiber communication system can be divided into three parts, namely, optical transmitter, optical fiber, optical receiver. The processed signal from the electronic terminal is used to modulate the light on the optical transmitter, electronic signal can be converted into optical signal in the process. Then the modulated optical signal is coupled to the optical fiber. The optical signal from optical fiber is converted into electronic signal on the optical receiver, then this weak electronic signal is amplified to the enough level and sent to the electronic terminal.
At first, the paper confirms the overall design scheme of the ditigal optical fiber communication system. It introduces an overview of the design idea based on CPLD and illustrates the choice of CPLD and how to configure in detail, system on programmable chip is established.
Secondly, the software and the hardware design method of the ditigal optical fiber communication system based on CPLD is discussed. According to "top-down" structure in the software part, the whole system is divided into four independent modules: PCM encoder and decoder, time division multiplexing signal source, channel encoder and decoder and digital terminal (bit synchronization, frame synchronization, demultiplexing), the design idea of each module is described amply and the simulation results on MAX+PLUSII are gived. The hardware part includes audio interface circuit, signal amplification circuit, PCM encoding and decoding circuit, periphery circuit of CPLD and power circuit, the chips used in the circuits are introduced, then circuit schematics and experimental waveforms are displayed.
Finally, software design files and hardware debugging results of the whole system are presented. Some questions in the software design and hardware debugging are analyzed and the problems in realization of CPLD and the solutions are discussed.
The results of software simulation and hardware debugging show that the digital optical fiber communication system can realize basic communication, besides, it is designed correctly and the performance is excellent.
引文
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[19]王开军,姜宇柏.面向CPLD/FPGA的VHDL设计[M].北京:机械工业出版社,2006
[20]通信原理实验.孝感:孝感学院电工电子实验教学中心,2006
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[22]孙娇燕.586B码编解码方案的分析与改进[J].大连:光通信技术.1994
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[26]张文,姚福安,候磊.基于FPGA实现的一种新型数字锁相环[J].山东:现代电子技术,2007
[27]董介春,李万玉.基于VHDL语言的数字锁相环的设计与实现[J].青岛:青岛大学学报,2004
[28]霓虹霞,杨信昌.基于VHDL的全数字锁相环的设计[J].长春:长春工程学院学报,2005
[29]徐跃,王奇,何秋阳.一种可编程的全数字锁相环的实现[J].南京:电子技术应用,2004
[30]卢文全.光纤通信概述[J].桂林:光纤通信技术,1997
[31]刘彦平,万国金,李迟生,胡乐.一种基于FPGA帧同步电路设计[J].南昌:信息技术,2006
[32]王钦泽,张尊泉.一种用VHDL语言实现的帧同步算法[J].武汉:现代电子技术,2003
[33]王俊年,杨勇.基于ISP的数字通信系统帧同步电路设计[J].长沙:长沙电力学院学报,2003
[34]王福昌,潘晓明.通信原理实验.武汉:华中科技大学电子信息与信息工程系,2002
[35]Derichson,Dennism,ed.Fiber optical Test and Measurement.Upper Saddle Rivev,N.J.:Prentice Hall PTR,1998
[36]魏守明,郭士增.新型SLIC PBL38710/1及其应用[J].哈尔滨:电子技术应用,2004
[37]光纤通信实验平台实验讲义.南京:南京恒缔科技有限公司,2004
[38]王志功.光纤通信集成电路设计[M].北京:高等教育出版社,2003
[39]Michanel Shur.Introduction to Electronic Devices.New York:John Wiley & sons,Inc,1996
[40]赵明忠.基于FPGA技术的数字相关器的设计与实现[J].南京:电子技术与应用,2002
[41]薛宏熙,边计年,苏明.数字系统设计自动化[M].北京:清华大学出版社,1996
[42]刘宝琴,张芳兰,田立生.ALTERA可编程逻辑器件及其应用[M].北京:清华大学出版社,1995
[43]John F.Wakerly.Digital Design Principles and Practices[M].USA:Prentice hall/Pearson,2003
[44]何伟,张玲.消除CPLD/FPGA器件设计中的毛刺[J].重庆:重庆大学学报,2002
[45]瞿江峰.VHDL语言及其在实际电路设计中的简化问题[J].苏州:高职论丛,2006
[2]赵梓森.光纤通信工程[M].北京:人民邮电出版社,1987
[3]唐玉麟.光纤通信应用[M].桂林:广西师范大学出版社,1988
[4]宋万杰,罗丰,吴顺君.CPLD技术及其应用[M].西安:西安电子科技大学出版社,1999
[5]刘文杰.用VHDL语言对CPLD和FPGA器件进行开发时应注意的事项[J].苏州:苏州大学学报,2005
[6]黄正谨,徐坚.CPLD系统设计技术入门与应用[M].北京:电子工业出版社,2002
[7]李景华,杜玉远.可编程逻辑器件与EDA技术[M].沈阳:东北大学出版社,2000
[8]候伯亨,顾新.VHDL硬件描述语言与数字逻辑电路设计[M].西安:西安电子科技大学出版社,1998,9-10
[9]Uyemura,J.P.A First Course in Digtital Systems Design An Integrate Approach[M].USA:China Machine Press,2000
[10]杨为理.现代通信集成电路应用技术手册(上)[M].北京:电子工业出版社,1994
[11]张卫刚.通信原理与通信技术[M].西安:西安电子科技大学出版社,2003
[12]王道宪.CPLD/FPGA可编程逻辑器件应用与开发[M].北京:国防工业出反社,2003
[13]汤琳宝,陈恒,顾敏.可编程逻辑器件与数字系统设计[M].上海:上海大学出版社,2000
[14]樊昌信,徐炳祥,吴成柯.通信原理[M].北京:国防工业出版社,2001,89-106
[15]范秋华,张冬梅.基于VHDL的可编程分频器在波形发生器中的应用[J].青岛:青岛大学学报,2003
[16]姜雪松,刘东升.硬件描述语言VHDL教程[M].西安:西安交通大学出版社,2004,271-277
[17]康华光.电子技术基础数字部分[M].北京:高等教育出版社,1998,125-166
[18]Pearson.Eric.R.The complete Guide to Fiber Optic Cable System Installation[M].USA:Thomson Learning,1997
[19]王开军,姜宇柏.面向CPLD/FPGA的VHDL设计[M].北京:机械工业出版社,2006
[20]通信原理实验.孝感:孝感学院电工电子实验教学中心,2006
[21]杨浚明等.光纤通信设计[M].天津:天津科学技术出版社,1995
[22]孙娇燕.586B码编解码方案的分析与改进[J].大连:光通信技术.1994
[23]潘明,龚然礼.采用吞脉冲技术小数分频器的FPGA实现[J].桂林:计算机科学与自动化,2003
[24]安亚飞.可编程逻辑器件在光纤通信系统中的应用[D].郑州:郑州大学,2005
[25]张少锋,杨章顺,戴琦,齐恒,冉立新.光纤数字通信系统586B编译码的FPGA实现[J].杭州:光通信技术,2004
[26]张文,姚福安,候磊.基于FPGA实现的一种新型数字锁相环[J].山东:现代电子技术,2007
[27]董介春,李万玉.基于VHDL语言的数字锁相环的设计与实现[J].青岛:青岛大学学报,2004
[28]霓虹霞,杨信昌.基于VHDL的全数字锁相环的设计[J].长春:长春工程学院学报,2005
[29]徐跃,王奇,何秋阳.一种可编程的全数字锁相环的实现[J].南京:电子技术应用,2004
[30]卢文全.光纤通信概述[J].桂林:光纤通信技术,1997
[31]刘彦平,万国金,李迟生,胡乐.一种基于FPGA帧同步电路设计[J].南昌:信息技术,2006
[32]王钦泽,张尊泉.一种用VHDL语言实现的帧同步算法[J].武汉:现代电子技术,2003
[33]王俊年,杨勇.基于ISP的数字通信系统帧同步电路设计[J].长沙:长沙电力学院学报,2003
[34]王福昌,潘晓明.通信原理实验.武汉:华中科技大学电子信息与信息工程系,2002
[35]Derichson,Dennism,ed.Fiber optical Test and Measurement.Upper Saddle Rivev,N.J.:Prentice Hall PTR,1998
[36]魏守明,郭士增.新型SLIC PBL38710/1及其应用[J].哈尔滨:电子技术应用,2004
[37]光纤通信实验平台实验讲义.南京:南京恒缔科技有限公司,2004
[38]王志功.光纤通信集成电路设计[M].北京:高等教育出版社,2003
[39]Michanel Shur.Introduction to Electronic Devices.New York:John Wiley & sons,Inc,1996
[40]赵明忠.基于FPGA技术的数字相关器的设计与实现[J].南京:电子技术与应用,2002
[41]薛宏熙,边计年,苏明.数字系统设计自动化[M].北京:清华大学出版社,1996
[42]刘宝琴,张芳兰,田立生.ALTERA可编程逻辑器件及其应用[M].北京:清华大学出版社,1995
[43]John F.Wakerly.Digital Design Principles and Practices[M].USA:Prentice hall/Pearson,2003
[44]何伟,张玲.消除CPLD/FPGA器件设计中的毛刺[J].重庆:重庆大学学报,2002
[45]瞿江峰.VHDL语言及其在实际电路设计中的简化问题[J].苏州:高职论丛,2006