UHF RFID阅读器接收机中混频电路的设计研究
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摘要
近几年,超高频频段射频识别系统应用的要求推动了超高频阅读器和电子标签的研究与开发。同时,CMOS射频集成电路的发展迅速,使CMOS工艺实现无线通信收发器已经成为可能。作为射频识别阅读器中重要的组成部分,混频电路的设计受到了极大的技术挑战。
本文系统论述了超高频阅读器中混频电路的设计与实现。首先根据协议分析了UHF RFID阅读器在系统实现上的难点。在比较各种主流射频接收机结构的优缺点后,提出了系统解决方案和接收机架构。接着针对设计指标要求较高的噪声和线性度对电路进行了详细的分析,提出了具体改进的方案。设计了一种有别于传统有源和无源混频电路的窄带电流型混频电路,并对其进行了详细的分析。最后采用TSMC 0.25UM MIXED SIGNAL工艺对其进行了仿真验证、版图设计和后仿真。
在广泛文献调研的基础上,本文取得了如下成果:
1、提出了一种适用于超高频射频识别阅读器的I/Q两路零中频结构的射频接收机方案,为本文设计的混频电路提供了系统背景。
2、分析了电流型混频器噪声产生的原因,提出了动态噪声消除技术的方案来减小电路噪声。
3、分析了电流型混频器非线性产生的原因,给出了决定三阶交调和二阶交调的主要因素,提出了改善电路非线性的具体优化方案。
4、根据系统指标要求,设计了一种新颖的三段式电流型混频电路,由跨导模块,开关模块和跨阻模块三个电路模块组成。仿真表明,其1/f噪声转折频率为90kHz,输入三阶交调点为12.6dBm,增益为20dB。相比传统混频电路在噪声、线性度和增益等指标上有了显著的提高。
本文的研究受上海市科委基金项目(AM07SA04)资助。
The research and development on UHF RFID reader and tag are driven by the requirements in application of UHF RFID systems in recent years. Simultaneously, CMOS RFIC developed very fast and it is possible to integrate a wireless transceiver into a chip via CMOS process. Mixer, one of the most important blocks in the front-end in UHF RFID reader, is designed with large technical challenges.
Design and implementation of mixer in UHF RFID reader receiver is presented in this dissertation. The difficult of the design is introduced under the UHF RFID standard. The advantages and disadvantages of several types of the receiver's structure are presented and the system solutions and receiver structure are then proposed. Based on the systematical study of the noise and nonlinearity performance, the mixers are optimized according to the demands of zero-IF receiver. A new structure of mixer is proposed witch is different from the active and passive mixer. This design is implemented by TSMC 0.25UM MIXED SIGNAL process, and the pre-simulation layout design and post-layout simulation is then implemented.
Characteristic works in the dissertation are summarized as follows:
1、A zero-IF receiver of UHF RFID reader is proposed. Based on system requirements, the specification for the mixer circuit is presented.
2、The noise of current mixer is investigated. A dynamic noise cancellation technology is proposed to reduce the noise.
3、The nonlinear behavior of current mixer is investigated. Several optimization methods are proposed to improve the nonlinear of the circuit.
4、The design of a three-step-current mixer including transconductance stage, switching stage and transimpedance stage is implemented. The simulation showed that the 1 / f noise corner frequency of 90 kHz, input third-order cross-point of 14 dBm and gain of 20 dB. Compared to traditional mixer, the noise, linearity and gain is improved.
本文系统论述了超高频阅读器中混频电路的设计与实现。首先根据协议分析了UHF RFID阅读器在系统实现上的难点。在比较各种主流射频接收机结构的优缺点后,提出了系统解决方案和接收机架构。接着针对设计指标要求较高的噪声和线性度对电路进行了详细的分析,提出了具体改进的方案。设计了一种有别于传统有源和无源混频电路的窄带电流型混频电路,并对其进行了详细的分析。最后采用TSMC 0.25UM MIXED SIGNAL工艺对其进行了仿真验证、版图设计和后仿真。
在广泛文献调研的基础上,本文取得了如下成果:
1、提出了一种适用于超高频射频识别阅读器的I/Q两路零中频结构的射频接收机方案,为本文设计的混频电路提供了系统背景。
2、分析了电流型混频器噪声产生的原因,提出了动态噪声消除技术的方案来减小电路噪声。
3、分析了电流型混频器非线性产生的原因,给出了决定三阶交调和二阶交调的主要因素,提出了改善电路非线性的具体优化方案。
4、根据系统指标要求,设计了一种新颖的三段式电流型混频电路,由跨导模块,开关模块和跨阻模块三个电路模块组成。仿真表明,其1/f噪声转折频率为90kHz,输入三阶交调点为12.6dBm,增益为20dB。相比传统混频电路在噪声、线性度和增益等指标上有了显著的提高。
本文的研究受上海市科委基金项目(AM07SA04)资助。
The research and development on UHF RFID reader and tag are driven by the requirements in application of UHF RFID systems in recent years. Simultaneously, CMOS RFIC developed very fast and it is possible to integrate a wireless transceiver into a chip via CMOS process. Mixer, one of the most important blocks in the front-end in UHF RFID reader, is designed with large technical challenges.
Design and implementation of mixer in UHF RFID reader receiver is presented in this dissertation. The difficult of the design is introduced under the UHF RFID standard. The advantages and disadvantages of several types of the receiver's structure are presented and the system solutions and receiver structure are then proposed. Based on the systematical study of the noise and nonlinearity performance, the mixers are optimized according to the demands of zero-IF receiver. A new structure of mixer is proposed witch is different from the active and passive mixer. This design is implemented by TSMC 0.25UM MIXED SIGNAL process, and the pre-simulation layout design and post-layout simulation is then implemented.
Characteristic works in the dissertation are summarized as follows:
1、A zero-IF receiver of UHF RFID reader is proposed. Based on system requirements, the specification for the mixer circuit is presented.
2、The noise of current mixer is investigated. A dynamic noise cancellation technology is proposed to reduce the noise.
3、The nonlinear behavior of current mixer is investigated. Several optimization methods are proposed to improve the nonlinear of the circuit.
4、The design of a three-step-current mixer including transconductance stage, switching stage and transimpedance stage is implemented. The simulation showed that the 1 / f noise corner frequency of 90 kHz, input third-order cross-point of 14 dBm and gain of 20 dB. Compared to traditional mixer, the noise, linearity and gain is improved.
引文
[1] 860MHz-930MHz Class I Radio Frequency Identification Tag Radio Frequency & Logical Communication Interface Specification Candidate Recommendation, Version 1.0.1: Auto-ID Center, 2002-11-14.
[2] Information technology automatic identification and data capture techniques-Radio frequency identification for item management air interface-Part 6:Parameters for air interface communications at 860-960MHz: ISO/IEC JTC 1/SC 31/WG 4 N0722,ISO-18000, 2003-11-26.
[3] EPCTM Radio-Frequency Identity Protocols Class-1 Generation-2 UHF RFID Protocol for Communications at 860 MHz-960 MHz Version 1.1.0
[4] EPC Global, 2005-10-17.
[5] http://www.maxell.co.jp/.
[6] Kipnis I, Chiu S, Loyer M, et al., A 900 MHz UHF RFID Reader Transceiver IC, ISSCC 2007, 2007, pp. 214-215.
[7] Kwon I, Bang H, Choi K, et al., A Single-Chip CMOS Transceiver for UHF Mobile RFID Reader, ISSCC 2007,2007, pp. 216-217.
[8] Safarian A, Shameli A, Rofougaran A, et al., An Integrated RFID Reader, ISSCC 2007, 2007, pp. 218-219.
[9] Finkenzeller K, RFID Handbook Radio-Frequency Identification Fundamentals and Applications, 2nd ed., New York: Wiley, 2003.
[10] Juha H and John T, OFDM wireless LANs: A theoretical and practical guide, Indianapolis, IN: Sams Publishing, 2002.
[11] H.Darabi. A 2.4-GHz CMOS Transceiver for Bluetooth. IEEE J. of Solid-State Circuits 2001, 36:2016-2024
[12] Reinhold L and Pavel B, RF circuit design: theory and applications, Hong Kong: Pearson education north Asia limited, 2002.
[13] Abidi A A. Direct-conversion radio transceivers for digital communications. IEEE J. of Solid-State Circuits 1995, 30:1399-1410
[14] D.Manstretta, R.Castello and F.Svelto. Low 1/f noise CMOS active mixers for direct conversion. IEEE Trans.Circuits Syst.II 2001,48:846-850
[15] Jang J-E, Lee H, Choi S-W, et al., A 900-MHz Direct-Conversion Transceiver for Mobile RFID Systems, IEEE Radio Frequency Integrated Circuits Symposium, 2007, pp. 277-280.
[16] K.BultandJ.G and Geelen. An inherently linear and compact MOST-only cuerrnt division technique. IEEE J. of Solid-State Circuits 1992, 27:
[17] B. Razavi, RF Microelectronics, Upper Saddle River, NJ: Prentice Hall PTR,, 1998.
[18] Thomas H L, The design of CMOS radio-frequency integrated circuits, Cambridge: Cambridge University Press, 1998.
[19] Darabi H and Abidi A A. Noise in RF-CMOS Mixers: a simple physical model. IEEE J. of Solid-State Circuits 2000, 35:15-25
[20] Terrovits M T and Meyer R G. Noise in current-commutating CMOS mixers. IEEE J. of Solid-State Circuits 1999, 34:772-783
[21] C.D.Hull and R.G.Meyer. A systematic approach to the analysis of noise in mixers. IEEE Trans.Circuits and Systems-I.Fundamental Theory and Applications 1993,40:909-919
[22] Zhou S and Chang M F. A CMOS passive mixer with low flicker noise for low-power direct-conversion receiver. IEEE J. of Solid-State Circuits 2005, 40:1084-1093
[23] G.Montagna, R.Castello, R.Tonietto, et al. A 72 mW CMOS 802.11a direct conversion receiver with 3.5 dB NF and 200 kHz 1/f Noise Corner. Sym.on VLSI Circuits Dig.of Tech.Papers 2004,16-19
[24] J.Park, Lee C-H, B.Kim, et al. A Low flicker noise CMOS mixer using two resonating inductors for direct conversion receivers. IEEE Int.Microwave Symp.Dig. 2006, 3:1489-1492
[25] Darabi H and Chiu J. A Noise cancellation technique in active-RF CMOS mixers. IEEE J. of Solid-State Circuits 2005,40:2628-2632
[26] Brandolini M, Rossi P, Sanzogni D, et al. A +78dBm IIP2 CMOS direct downconversion mixer for fully integrated UMTS receivers. IEEE J. of Solid-State Circuits 2006,41:552-559
[27] E.Bautista E. A high IIP2 downconversion mixer using dynamic matching. IEEE J. of Solid-State Circuits 2000, 35:1934-1941
[28] Wambacq P and Sansen W, Distortion Analysis of Analog Integrated Circuits, Boston: MA: Kluwer, 1998.
[29] Terrovitis M T and Meyer R G. Intermodulation distortion in current-commutating CMOS mixers. IEEE J. of Solid-State Circuits 2000, 35:1461-1473
[30] Gilbert. B. The multi-tanh principle: a tutorial over view. IEEE J. of Solid-State Circuits 1998, 33:2(R) 17
[31] Valla M, Montagna G, Castello R, et al. A 72-mW CMOS 802.11a direct-conversion front-end with 3.5-dB NF and 200-kHz 1/f noise corner,. IEEE J. of Solid-State Circuits 2005,40:970-977
[32] D.Shaeffer and T.Lee. A 1.5V.1.5 GHz CMOS low noise amplifier. IEEE J. of Solid-State Circuits 1997, 32:745-759
[33] Cha C and Lee S. A 5.2 GHz LNA in 0.35-μm CMOS utilzing inter-stage series resonance and optimizing the substrate resistance. IEEE J. of Solid-State Circuits 2003, 38:669-672
[34] Paolo R, Antonio L, Massimo B, et al. A variable gain RF front end based on a Voltage-Voltage feedback LNA, for multistandard applications. IEEE J. of Solid-State Circuits 2005, 40:690-697
[35] H.Sjoland, A.Karimi-Sanjaani and A.Abidi. A merged CMOS LNA and mixer for a WCDMA receiver. IEEE J. of Solid-State Circuits 2003, 38:1045-1050
[36] Shahani A, Shaeffer D K and Lee T H. A 12-mW wide dynamic range CMOS front-end for a portable GPS receiver. IEEE J. of Solid-State Circuits 1997, 32: 2061-2070
[37] Aparin V, Kim N, Brown G, et al., A fully-integrated highly linear zero-IF CMOS cellular CDMA receiver, IEEE Int. Solid-State Circuits Conf. 2005 Dig. Tech, San Francisco, CA, 2005, pp. 324-325.
[38] Razavi B, Design of Analog CMOS and Integrated Circuits, New York: McGraw-Hill Inc, 2001.
[39] J.Park, C.-H.Lee, B.Kim, et al. Design and analysis of low flicker noise CMOS mixers for direct conversion receivers. IEEE Trans.Microwave Theory and Techniques 2006, 54:4372-4380
[40] Hastings A, The Art of Analog Layout, Upper Saddle River, NJ: Prentice Hall, 2001.
[41] Cao Y, Groves R A, Huang X, et al. Frequency-independent equivalent-circuit model for on-chip spiral inductors. IEEE J. of Solid-State Circuits 2003, 38:419-426
[2] Information technology automatic identification and data capture techniques-Radio frequency identification for item management air interface-Part 6:Parameters for air interface communications at 860-960MHz: ISO/IEC JTC 1/SC 31/WG 4 N0722,ISO-18000, 2003-11-26.
[3] EPCTM Radio-Frequency Identity Protocols Class-1 Generation-2 UHF RFID Protocol for Communications at 860 MHz-960 MHz Version 1.1.0
[4] EPC Global, 2005-10-17.
[5] http://www.maxell.co.jp/.
[6] Kipnis I, Chiu S, Loyer M, et al., A 900 MHz UHF RFID Reader Transceiver IC, ISSCC 2007, 2007, pp. 214-215.
[7] Kwon I, Bang H, Choi K, et al., A Single-Chip CMOS Transceiver for UHF Mobile RFID Reader, ISSCC 2007,2007, pp. 216-217.
[8] Safarian A, Shameli A, Rofougaran A, et al., An Integrated RFID Reader, ISSCC 2007, 2007, pp. 218-219.
[9] Finkenzeller K, RFID Handbook Radio-Frequency Identification Fundamentals and Applications, 2nd ed., New York: Wiley, 2003.
[10] Juha H and John T, OFDM wireless LANs: A theoretical and practical guide, Indianapolis, IN: Sams Publishing, 2002.
[11] H.Darabi. A 2.4-GHz CMOS Transceiver for Bluetooth. IEEE J. of Solid-State Circuits 2001, 36:2016-2024
[12] Reinhold L and Pavel B, RF circuit design: theory and applications, Hong Kong: Pearson education north Asia limited, 2002.
[13] Abidi A A. Direct-conversion radio transceivers for digital communications. IEEE J. of Solid-State Circuits 1995, 30:1399-1410
[14] D.Manstretta, R.Castello and F.Svelto. Low 1/f noise CMOS active mixers for direct conversion. IEEE Trans.Circuits Syst.II 2001,48:846-850
[15] Jang J-E, Lee H, Choi S-W, et al., A 900-MHz Direct-Conversion Transceiver for Mobile RFID Systems, IEEE Radio Frequency Integrated Circuits Symposium, 2007, pp. 277-280.
[16] K.BultandJ.G and Geelen. An inherently linear and compact MOST-only cuerrnt division technique. IEEE J. of Solid-State Circuits 1992, 27:
[17] B. Razavi, RF Microelectronics, Upper Saddle River, NJ: Prentice Hall PTR,, 1998.
[18] Thomas H L, The design of CMOS radio-frequency integrated circuits, Cambridge: Cambridge University Press, 1998.
[19] Darabi H and Abidi A A. Noise in RF-CMOS Mixers: a simple physical model. IEEE J. of Solid-State Circuits 2000, 35:15-25
[20] Terrovits M T and Meyer R G. Noise in current-commutating CMOS mixers. IEEE J. of Solid-State Circuits 1999, 34:772-783
[21] C.D.Hull and R.G.Meyer. A systematic approach to the analysis of noise in mixers. IEEE Trans.Circuits and Systems-I.Fundamental Theory and Applications 1993,40:909-919
[22] Zhou S and Chang M F. A CMOS passive mixer with low flicker noise for low-power direct-conversion receiver. IEEE J. of Solid-State Circuits 2005, 40:1084-1093
[23] G.Montagna, R.Castello, R.Tonietto, et al. A 72 mW CMOS 802.11a direct conversion receiver with 3.5 dB NF and 200 kHz 1/f Noise Corner. Sym.on VLSI Circuits Dig.of Tech.Papers 2004,16-19
[24] J.Park, Lee C-H, B.Kim, et al. A Low flicker noise CMOS mixer using two resonating inductors for direct conversion receivers. IEEE Int.Microwave Symp.Dig. 2006, 3:1489-1492
[25] Darabi H and Chiu J. A Noise cancellation technique in active-RF CMOS mixers. IEEE J. of Solid-State Circuits 2005,40:2628-2632
[26] Brandolini M, Rossi P, Sanzogni D, et al. A +78dBm IIP2 CMOS direct downconversion mixer for fully integrated UMTS receivers. IEEE J. of Solid-State Circuits 2006,41:552-559
[27] E.Bautista E. A high IIP2 downconversion mixer using dynamic matching. IEEE J. of Solid-State Circuits 2000, 35:1934-1941
[28] Wambacq P and Sansen W, Distortion Analysis of Analog Integrated Circuits, Boston: MA: Kluwer, 1998.
[29] Terrovitis M T and Meyer R G. Intermodulation distortion in current-commutating CMOS mixers. IEEE J. of Solid-State Circuits 2000, 35:1461-1473
[30] Gilbert. B. The multi-tanh principle: a tutorial over view. IEEE J. of Solid-State Circuits 1998, 33:2(R) 17
[31] Valla M, Montagna G, Castello R, et al. A 72-mW CMOS 802.11a direct-conversion front-end with 3.5-dB NF and 200-kHz 1/f noise corner,. IEEE J. of Solid-State Circuits 2005,40:970-977
[32] D.Shaeffer and T.Lee. A 1.5V.1.5 GHz CMOS low noise amplifier. IEEE J. of Solid-State Circuits 1997, 32:745-759
[33] Cha C and Lee S. A 5.2 GHz LNA in 0.35-μm CMOS utilzing inter-stage series resonance and optimizing the substrate resistance. IEEE J. of Solid-State Circuits 2003, 38:669-672
[34] Paolo R, Antonio L, Massimo B, et al. A variable gain RF front end based on a Voltage-Voltage feedback LNA, for multistandard applications. IEEE J. of Solid-State Circuits 2005, 40:690-697
[35] H.Sjoland, A.Karimi-Sanjaani and A.Abidi. A merged CMOS LNA and mixer for a WCDMA receiver. IEEE J. of Solid-State Circuits 2003, 38:1045-1050
[36] Shahani A, Shaeffer D K and Lee T H. A 12-mW wide dynamic range CMOS front-end for a portable GPS receiver. IEEE J. of Solid-State Circuits 1997, 32: 2061-2070
[37] Aparin V, Kim N, Brown G, et al., A fully-integrated highly linear zero-IF CMOS cellular CDMA receiver, IEEE Int. Solid-State Circuits Conf. 2005 Dig. Tech, San Francisco, CA, 2005, pp. 324-325.
[38] Razavi B, Design of Analog CMOS and Integrated Circuits, New York: McGraw-Hill Inc, 2001.
[39] J.Park, C.-H.Lee, B.Kim, et al. Design and analysis of low flicker noise CMOS mixers for direct conversion receivers. IEEE Trans.Microwave Theory and Techniques 2006, 54:4372-4380
[40] Hastings A, The Art of Analog Layout, Upper Saddle River, NJ: Prentice Hall, 2001.
[41] Cao Y, Groves R A, Huang X, et al. Frequency-independent equivalent-circuit model for on-chip spiral inductors. IEEE J. of Solid-State Circuits 2003, 38:419-426