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全数控短波接收机前端电路的设计与实现
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摘要
短波通信是指通过电离层的反射或折射后返回地面的电波传输的一种通信方式,被广泛应用于广播、导航和军事等领域。因为其具有抗摧毁能力强、设备简单、临时组网方便等特点,短波通信成为军事指挥作战的重要通信方式。然而,现代无线电通信的电磁环境越来越复杂,短波无线电通信设备大量增加,信号越来越拥挤,导致电台相互之间产生干扰,甚至产生阻塞而无法使用。因此,设计具有抗噪声、抗干扰、抗衰落、抗多径能力强且可以智能控制的短波接收机高中频前端电路,就显得特别急切。
     本文首先通过分析几种常见接收机的结构、性能和优缺点,并结合课题所要求的频率分辨率、基准灵敏度、中频选择性、中频抑制比、镜频抑制比、阻塞、倒易混频和频率稳定度等主要技术指标确定了采用基于软件无线电的数字IF接收机结构。而本文的重点在于数字IF接收机的高中频前端电路部分。为了有效地提高镜频抑制比,混频电路的输出选择41.4MHz高中频;为了提高抗邻道干扰和阻塞干扰的能力,短波接收机前端电路中采用8组数控电调谐预选滤波器;为了有效提高中频抑制比,在混频之前,采用具有中频陷波点低通滤波器;为了提高系统的灵敏度,采用噪声系数很小的双栅场效应管3SK223设计低噪声放大器;为了减小组合频率的干扰,选择双平衡混频器ADE-1实现接收机前端的混频功能;为了增大增益受控动态范围,采用多级自动增益控制电路;为了实现高精度高稳定度的本振源及所要求的频率分辨率,采用单片机控制DDS芯片AD9953的方法设计本振,并采用高精度锁相倍频电路把高精度恒温晶振18.432MHz外部20倍频至368.64MHz作为AD9953的参考时钟源以减小相位噪声,采用跟踪滤波电路减小DDS固有的杂散信号,采用幅频均衡电路实现DDS输出信号的幅度平坦。
     完成各个模块电路的设计、安装和调试,再按照给出的各项指标的测试方法测试模块电路的指标后,再对整个系统的各项指标进行测试,测试出的所有指标均达到课题要求。
Short-wave communication is a means of wave transmissions communication, which back to the ground by ionospheric reflection or reflection. It is widely applied to the field of broadcast, navigation, military affairs and so on. Because of the anti-jamming ability, simple equipment and easy for temporary networking, short-wave radio is the vital part in military operations. However, the electromagnetic environment is more and more complex, and short-wave radio communication equipments are increasing, so the short-wave signals become more and more crowded, which leads to radio disturbance among each other and even produces obstruction. Therefor, it is required to design the RF-IF circuit in the front-end of short-wave receiver which has characteristics such as anti-noise, anti-interference, anti-fading, anti-multipath ability and intelligent control.
     Structure, performance, the advantages and disadvantages of several shortwave receivers are analyzed firstly in the paper. Based on the main technical indicators of short-wave receiver such as frequency resolution, insensitivity, IF selectivity, image rejection, IF recjection, blocking, reciprocal mixing and frequency stability, the digital IF receiver structure based on software radio is defined. And RF-IF circuit in the front-end of the digital IF receiver is discussed importantly in the paper. In order to improve the image rejection, the output of the mixer is designed to high-intermediate-frequency. In order to improve the ability of anti adjacent channel interference and blocking interference, the short-wave band is divided into eight bands, and each band is tuned and controlled by chip microcomputer. In order to improve the IF rejection, adopt a IF notch lowpass filter before the mixer. In order to improve the sensitivity of the system, employ a dual-gate FET3SK223whose noise figure is very low to design low noise amplifier. In order to reduce the interference of combination frequency, select double-balanced mixer ADE-1to complete the frequency conversion function. In oeder to increase the gain controlled dynamic range, use multi-stage automatic gain control circuits. In order to achieve high precision and high stability local oscillator whose frequency resolution is1Hz, direct digital synthesizer is choosed, and take some measures to improve the local oscillator performance, such as select oscillator368.64MHz which is produced by OCXO18.432MHz and external high-precision phase-locked multiplier with a factor of20as the reference oscillator to degrade the effects of phase noise of on-chip multiplier, employ the tracking filter to effectively eliminate the spurious signals and harmonics of sinusoidal waveform, Add gain control circuit controlled by frequency amplitude control word and DAC output to keep amplitude basically steady in required frequency range.
     Each module is produced, installed and debugged, and then test the technical indicators of each module according to the given testing methods, and then test the various indicators of the system. All of the results of the short-wave receiver meet the subject requirements.
引文
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